1. Week #5 Arithmetic Circuits
ENG241 Digital Design
Week #5
Arithmetic Circuits
School of Engineering

2. Topics Binary Adders Binary Ripple Carry Adder 1’s and 2’s Complement
Binary Subtraction
Binary Adder-Subtractors
Binary Multipliers
BCD Arithmetic
School of Engineering

3. Resources Chapter #5, Mano Sections 5.2 Binary Adders
5.3 Binary Subtraction
5.4 Binary Adders-Subtractors
5.5 Binary Multiplications
5.7 HDL Representations -- VHDL
School of Engineering

4. Half Adder
S = XY’ + X’Y
= X  Y
C = X.Y

5. Recall: Arithmetic -- addition
Binary similar to decimal arithmetic
No carries 1 +
Carries + 1 1 1
Remember:
1+1 is 2 (or (10)2), which results in a carry
1+1+1 is 3 (or (11)2) which also results in a carry

6. Full Adder Three inputs: Two outputs: Implementation? X YZ
Cout S
Three inputs: X Y
Third is Cin  Z
Two outputs:
Sum
Cout
Implementation?

7. Straight Forward Implementation:
K Map for S S Z
What is this?

8. Straight Forward Implementation:
K Map for C X Y C X Z Y Z

9. Implementation Issues
If we try to implement the Optimized Boolean functions directly we will need how many gates?
Seven AND gates and two OR Gates!!
Can we do better?
Share Logic
Hierarchical Design.

10. Any Alternatives?
Try to make use of hierarchy to design a 1-bit full adder from two half adders.
Also, try to share logic between the Sum output and Carry output.
Full Adder
S = X  Y  Z
C = XY + XZ + YZ
Half Adder
S = X  Y
C = XY

11. A Different Way to Represent C
XYZ YZ 00 01 11 10 X 1 1 XY
XYZ
C = XY + XYZ + XYZ
C = XY + Z (XY + XY)

12. Two Half Adders (and an OR)
How many Gates do we need?
Full Adder x y Z C S

13. Binary Ripple-Carry Adder
A Parallel binary adder is a digital circuit that produces the arithmetic sum of two binary numbers using only combinational logic.
The parallel adder uses “n” full adders in parallel, with all input bits applied simultaneously to produce the sum.
The full adders are connected in cascade, with the carry output from one full adder connected to the carry input of the next full adder.

14. Binary Ripple-Carry Adder
Straightforward – connect full adders
Carry-out to carry-in chain
C0 in case this is part of larger chain, maybe just set to zero

15. Hierarchical 4-Bit Adder
We can easily use hierarchy here
Design half adder
Use TWO half adders to create full adder
Use FOUR full adders to create 4-bit adder
VHDL CODE?

16. VHDL Half Adder (DATA FLOW)
entity half_adder is
port (x,y: in std_logic;
s,c: out std_logic);
end half_adder;
architecture dataflow of half_adder is
begin
s <= x xor y;
c <= x and y;
end dataflow

17. VHDL Full Adder (Structural)
entity full_adder is
port (x, y, z: in std_logic;
s, c: out std_logic);
end full_adder;
architecture struc_dataflow of full_adder is hs tc
component half_adder
port (x, y : in std_logic;
s, c : out std_logic);
end component;
signal hs, hc, tc: std_logic;
begin
HA1: half_adder
port map (x, y, hs, hc);
HA2: half_adder
port map (hs, z, s, tc);
c <= tc or hc;
end struc_dataflow hc

18. Any Problems with this Design?
Delay
Approx how much?
Imagine a 64-bit adder
Look at carry chain

19. Carry Propagation & Delay
One problem with the addition of binary numbers is the length of time to propagate the ripple carry from the least significant bit to the most significant bit.
The gate-level propagation path for a 4-bit ripple carry adder of the last example:
Note: The "long path" is from A0 or B0 through the circuit to S3. A3 B3 S3 B2 S2 B1 S1 S0 B0 A2 A1 A0 C4 C3 C2 C1 C0

20. Subtraction We managed to design an Adder easily.
For subtraction, we will also need to design a Subtractor!!
Can we perform subtraction using the Adder Circuit we designed earlier?
YES, we can use the concept of Complements.
X = Y – Z  X = Y + complement(Z)

21. Complements? There are two types of complements for each base-r system
The radix complement, the (r’s) complement.
The diminished radix complement, (r-1)’s comp.
For Decimal System
10’s complement
9’s complement
For Binary Systems
2’s complement
1’s complement

22. Complements of Decimal System
The 9’s complement of a decimal number is obtained by subtracting each digit from 9.
Example: The 9’s complement of is
– =
The 10’s complement is obtained by adding 1 to the 9’s complement:
Example: The 10’s complement of is
– = =
Or, – =
Or, leave all least significant 0’s unchanged, subtract the first nonzero LSD from 10, and subtract all higher significant digits from 9.

23. Unsigned Decimal Subtraction
Example #1
Using 10’s complement, perform the subtraction – 3250.
No complements: – 3250 = 69282
M = (5-digits), N = 3250 (4-digits)
Since N has only 4 digits append a zero N=03250
10’s complement of N (03250)
99999 – = = 96750
Now add M to the 10’s comp of N
= (carry occurred)
The occurrence of the end carry indicates that M > N
Discard end carry ( – = 69282)

24. Unsigned Decimal Subtraction
Example #2
Using 10’s complement, perform the subtraction
No complements: =
M = 3250 (4-digits), N = (5-digits)
Since M has only 4 digits append a zero M=03250
10’s complement of N (72532)
99999 – = = 27468
Now add M to the 10’s comp of N
= (There is no end carry!)
No end carry indicates that M < N (make correction)
Answer: -(10’s complement of 30718) =

25. Binary Subtraction
We’ll use unsigned subtraction to motivate use of complemented representation

26. 1’s Complement 1’s Complement (Diminished Radix Complement)
All ‘0’s become ‘1’s
All ‘1’s become ‘0’s
Example ( )2
 ( )2
If you add a number and its 1’s complement …

27. 1’s Complement: Example
1’s Compl.
Notice that the 1’s complement of the number can be obtained by complementing each bit

28. 2’s Complement 2’s Complement (Radix Complement) 1 0 1 1 0 0 0 0
Take 1’s complement then add 1
Toggle all bits to the left of the first ‘1’ from the right
Example:
Number:
1’s Comp.: OR 1 1

29. 2’s Complement: Example1
- N
1’s Comp
2’s Compl.
Notice that the 2’s complement of the number can be obtained by complementing each bit and adding 1.

30. Example 19 – 30 = 21 !!!!! Borrow 1 (M) Minuend (N) Subtrahend -
Minuend is smaller than Subtrahend
Borrow 1
(M) Minuend
(N) Subtrahend -
Difference
19 – 30 = 21 !!!!!
Incorrect Result!!
How can we know if the result is incorrect? How to fix the problem?

31. Example Borrow 1 (M) Minuend (N) Subtrahend - Difference
If no borrow, then result is non-negative (minuend >= subtrahend).
Borrow 1
(M) Minuend
(N) Subtrahend -
Difference
Correct Diff -
Since there is borrow, result must be negative.
The result must be corrected to a negative number.
19 – 30 = -11

32. Algorithm: Subtraction of two n-digit Numbers M-N can be done as follows
Subtract N from M
If no borrow, then M  N and result is OK
Otherwise, N > M so result must be subtracted from 2n and a minus sign should be appended
NOTE: Subtraction of a binary number from 2n to obtain an n-digit result is called 2’s complement
Circuit?

33. Adder/Subtractor Circuit!!
Binary Adder
Binary Subtractor
EXPENSIVE!!

34. How to get rid of Subtraction Operation?
Any
Idea?
Use complements of numbers to replace the subtraction operation with addition only.

35. Subtraction of Unsigned Numbers Using Complements
M – N Equivalent to M + (2’s complement of N)
Add (2’s complement of N) to M
This is M + (2n – N) = M – N + 2n
Notice we are using addition to achieve subtraction.
If M  N, will generate carry!
Discard carry
Result is positive M - N
If M < N, no end carry will be generated!
Take 2’s complement of result
Place minus sign in front

36. Example X = 1010100 minus Y = 1000011 Notice that X > Y
The 2’s complement of Y= is obtained first by getting the 1’s complement  and then adding 1  ( ) X 1
+ 2’s comp Y
Sum

37. Example 2 Y = 1000011 minus X = 1010100 Notice Y < X No end carry
Answer: - (2’s complement of Sum) Y 1
+ 2’s comp X
Sum
We said numbers are unsigned. What does this mean?

38. Adder-Subtractor
By using 2’s complement approach we were able to get rid of the design of a subtractor.
Need only adder and complementer for input to subtract
Need selective complementer to make negative output back from 2’s complement

39. Selective 1’s Complementer?
When X = 0 we transfer Y to output
When X = 1 we complement Y
Control

40. Design S low for add, high for subtract
Inverts each bit of B if S is 1
Adds 1 to make 2’s complement

41. Negative Numbers Computers Represent Information in ‘0’s and ‘1’s
‘+’ and ‘−’ signs have to be represented in ‘0’s and ‘1’s
3 Systems
Signed Magnitude
1’s Complement
2’s Complement
All three use the left-most bit to represent the sign:
‘0’  positive
‘1’  negative

42. Signed Binary Numbers First review signed representations
Signed magnitude
Left bit is sign, 0 positive, 1 negative
Other bits are number
 +9
 -9
2’s complement
1’s complement

43. Signed Magnitude Representation
Magnitude is magnitude, does not change with sign
(+3)10  ( )2
(−3)10  ( )2 S
Magnitude (Binary)
Sign
Magnitude

44. 1’s Complement Representation
Positive numbers are represented in “Binary”
Negative numbers are represented in “1’s Comp.”
(+3)10  (0 011)2
(−3)10  (1 100)2
There are 2 representations for ‘0’!!!!!!
(+0)10  (0 000)2
(−0)10  (1 111)2
Magnitude (Binary) 1
Code (1’s Comp.)

45. 1’s Complement Range 4-Bit Representation 24 = 16 Combinations
− 7 ≤ Number ≤ + 7
−23+1 ≤ Number ≤ +23 − 1
n-Bit Representation
−2n−1+1 ≤ Number ≤ +2n−1 − 1
Decimal
1’s Comp.
+ 7
+ 6
+ 5
+ 4
+ 3
+ 2
+ 1
+ 0
− 0
− 1
− 2
− 3
− 4
− 5
− 6
− 7

46. 2’s Complement Representation
Positive numbers are represented in “Binary”
Negative numbers are represented in “2’s Comp.”
(+3)10  (0 011)2
(−3)10  (1 101)2
There is 1 representation for ‘0’
(+0)10  (0 000)2
(−0)10  (0 000)2
Magnitude (Binary) 1
Code (2’s Comp.)
1’s Comp

47. 2’s Complement Range 4-Bit Representation 24 = 16 Combinations
− 8 ≤ Number ≤ + 7
−23 ≤ Number ≤ + 23 − 1
n-Bit Representation
−2n−1 ≤ Number ≤ + 2n−1 − 1
Decimal
2’s Comp.
+ 7
+ 6
+ 5
+ 4
+ 3
+ 2
+ 1
+ 0
− 1
− 2
− 3
− 4
− 5
− 6
− 7
− 8

48. Convert 2’s Complement to Decimal
bit index
bit weighting
Example
Decimal x x26 0x25 1x24 0x23 0x22 1x21 0x20 =
bit index
bit weighting
Example
Decimal x x26 1x25 0x24 1x23 1x22 1x21 0x20 =

49. Number Representations
4-Bit Example
Unsigned Binary
Signed Magnitude
1’s Comp.
2’s Comp.
Range
0 ≤ N ≤ 15
-7 ≤ N ≤ +7
-8 ≤ N ≤ +7
Positive
Binary
Negative X 1 1 1

50. Example in 8-bit byte Represent +9 in different ways
Signed magnitude
1’s Complement
2’s Complement
Represent -9 in different ways
Signed magnitude
1’s Complement
2’s Complement
The
Same!

51. Observations All positive numbers are the same
1’s Comp and Signed Mag have two zeros
2’s Comp has more negative than positive
All negative numbers have 1 in high-order bit

52. Advantages/Disadvantages
Signed magnitude has problem that we need to correct after subtraction
One’s complement has a positive and negative zero
Two’s complement is most popular
i.e arithmetic operations are easy

53. Signed Magnitude Representation
Magnitude is magnitude, does not change with sign
(+3)10  ( )2
(−3)10  ( )2
Can’t include the sign bit in ‘Addition’ S
Magnitude (Binary)
Sign
Magnitude
 (+3)10
 (−3)10
 (−6)10

54. Signed Magnitude Representation
The signed-magnitude system is used in ordinary arithmetic, but is awkward when employed in computer arithmetic (Why?)
We have to separately handle the sign
Perform the correction.
Therefore the signed complement is normally used.

55. Binary Subtraction Using 1’s Comp. Addition
Change “Subtraction” to “Addition”
If “Carry” = 1 then add it to the LSB, and the result is positive (in Binary)
If “Carry” = 0 then the result is negative (in 1’s Comp.)
(5)10 – (1)10
(5)10 – (6)10
(+5)10 + (-1)10
(+5)10 + (-6)10 1 +
+ 4
− 1

56. Two’s Complement To Add: To subtract
easy on any combination of positive and negative numbers
To subtract
Take 2’s complement of subtrahend
Add
This performs A + ( -B), same as A – B

57. Binary Subtraction Using 2’s Comp. Addition
Change “Subtraction” to “Addition”
If “Carry” = 1 ignore it, and the result is positive (in Binary)
If “Carry” = 0 then the result is negative (in 2’s Comp.)
(5)10 – (1)10
(5)10 – (6)10
(+5)10 + (-1)10
(+5)10 + (-6)10
+ 4
− 1

58. Examples from Book Addition Subtraction (+6) + 13 (-6) + 13
(-6) + 13
(+6) + (- 13)
(-6) + (-13)
Subtraction
(-6) - (-13)
(+6) - (-13)

59. Addition of Two Positive Numbers
(+6) + 13 = +19
 +6
 +13
 +19
If a carry out appears it should be discarded.

60. Addition of : a Positive and Negative Numbers
(-6) + 13 = +7
(this is 2’s comp of +6)
The carry out was discarded

61. Subtraction of Two Numbers
The subtraction of two signed binary numbers (when negative numbers are in 2’s complement form) can be accomplished as follows:
Take the 2’s complement of the subtrahend (including the sign bit)
Add it to the minuend.
A Carry out of the sign bit position is discarded.

62. Subtraction of Two Numbers
(+6) – (+13) = -7
 (2’s comp)
What is ?
Take its 2’s complement=>
The magnitude is 7
So it must be -7

63. Circuit for 2’s complement Numbers
No Correction is needed if the signed numbers are in 2’s complement representation

64. Sign Extension
Sign extension is the operation, in computer arithmetic, of increasing the number of bits of a binary number while preserving the number’s sign (positive/negative) and value.
This is done by appending digits to the most significant side of the number
Examples:
2’s complement (6-bits  8-bits) 
2’s complement (5-bits  8-bits):
10001 

65. Overflow
In order to obtain a correct answer when adding and subtracting, we must ensure that the result has a sufficient number of bits to accommodate the sum.
If we start with two n-bit numbers and we end up with a number that is n+1 bits, we say an overflow has occurred.

66. Overflow Two cases of overflow for addition of signed numbers
Two large positive numbers overflow into sign bit
Not enough room for result
Two large negative numbers added
Same – not enough bits
Carry out can be OK

67. Examples Two signed numbers +70 and +80 are stored in 8-bit registers.
The range of binary numbers, expressed in decimal, that each register can accommodate is from +127 to -128.
Since the sum of the two stored numbers is 150, it exceeds the capacity of an 8-bit register.
The same applies for -70 and -80.

68. Overflow Detection Carries: 0 1 Carries: 1 0
The addition of +70 and +80 resulted in a negative number!
The addition of -70 and -80 also resulted in an incorrect value which is positive number!
An overflow condition can be detected by observing the carry into the sign bit position and the carry out of the sign bit position.
If the the carry in and carry out of the sign bit are not equal an overflow has occurred.

69. Circuit for Overflow Detection
Condition is that either Cn-1 or Cn is high, but not both

70. BCD Addition One decimal digit + one decimal digit 5 + 3 8 0 1 0 1
If the result is 1 decimal digit ( ≤ 9 ), then it is a simple binary addition
Example:
If the result is two decimal digits ( ≥ 10 ), then binary addition gives invalid combinations 5
+ 3 8 5
+ 5
1 0

71. Multiple Decimal Digits
BCD Addition
If the binary result is greater than 9, correct the result by adding 6 5
+ 5
1 0
Multiple Decimal Digits
Two Decimal Digits
3 5 1

72. Final answer (two digits)
BCD Arithmetic 8
1000
Eight +5
+0101
Plus Five 13
1101
is 13 (> 9)
Note that the result is MORE THAN 9, so must be represented by two digits!
To correct the digit, add 6 8 +5
1000
Eight
+0101
Plus 5 13
1101
is 13 (> 9)
+0110
so add 6
carry = 1
0011
leaving 3 + cy
0001 | 0011
Final answer (two digits)
ENG241/Digital Design 72

73. BCD Addition 4-bit binary adder Detection Circuit for Invalid BCD
Augend
Addend
4-bit binary adder
Input
Carry
Detection
Circuit for
Invalid BCD
Output
Carry
0 or 6
4-bit binary adder
BCD Sum
ENG241/Digital Design 73

74. BCD Addition

75. Recall: Arithmetic -- multiplication1 X 1 1

76. Multiplier Multiply by doing single-bit multiplies and shifts
Combinational circuit to accomplish this?

77. Combinational Multiplier
AND computes A0 B0
Half adder computes sum. Will need FA for larger multiplier.

78. Larger Multiplier: Resources
For J multiplier bits and K multiplicand bits we need
J x K AND gates
(J-1) K-bit adders to produce a product of J+K bits.

79. Larger Multiplier A k=4-bit by j=3-bit Binary Multiplier. J = 3 K = 4
Jxk = 12 AND Gates
(J-1) Adders
Of k bits each

80. End Slides

81. Carry Look ahead Adder Note that add itself just 2 level
Idea is to separate carry from adder function
Then make carry approx 2-level all way across larger adder

82. One-bit Subtractor Inputs: Outputs: Difference, borrow out
Borrow in,
minuend
subtrahend
Outputs: Difference, borrow out
Truth Table?
1-bit sub M S
Bout D
Bin

83. Correcting Result Borrow 1 Minuend Subtrahend - Difference 1 0 0 0 0 0
Minuend
Subtrahend -
Difference

84. Correcting Result
If M is minuend and N subtrahend of numbers length n, difference was
(2n + M) – N
What we want is magnitude of N-M with minus sign in front
We can get the correct result by subtracting previous result from 2n
N - M = 2n – (M – N + 2n)

85. Interpretation of the incorrect result
Borrow 1
Minuend
Subtrahend -
Difference 25 M N
(2n + M) – N

86. Correcting Result What, mathematically, does it mean to borrow?
It means that M < N
If borrowing at digit i-1 you are adding 2i

87. Designs Aren’t Like This
That’s why people use complemented interpretation for signed numbers
2’s complement
1’s complement

88. 2’s Complement The 2’s complement of 10101 is 01011
The 2’s complement of is 01011
The circuit that performs this is a complementer

89. 1’s Complement Given: binary number N with n digits
1’s complement defined as
(2n – 1) - N
Note that (2n – 1) is number with n digits, all of them 1
For n = 4, (2n – 1) = 1111

90. 2’s Complement Given: binary number N with n digits
2’s complement defined as
2n – N for N  0
0 for N = 0
Exception is so that the result will always have n bits
2’s complement is just a 1 added to 1’s complement

91. Still Remember? Unsigned Arithmetic Subtraction
Minuend 1 1 1 1 -
No borrows
Borrows 1 - 1 1 1
0 - 1 results in a borrow
Subtrahend

92. Four-bit Carry Look Ahead
Reference
Adder function
separated from
carry
Notice adder has A, B, C in
and S out, as well as G,P out.

93. BCD Addition
ENG241/Digital Design 93
School of Engineering