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Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. ID A12C:Noise Fundamentals and Techniques for Minimizing.

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Presentation on theme: "Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. ID A12C:Noise Fundamentals and Techniques for Minimizing."— Presentation transcript:

1 Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. ID A12C:Noise Fundamentals and Techniques for Minimizing EMI Problems Mitch Ferguson Manager Application Engineering Version: 1.1 12 October 2010

2 2 © 2010 Renesas Electronics America Inc. All rights reserved. Mr. Mitch Ferguson Applications Engineer Manager Specializes support design teams develop low-noise systems using MCUs. Over 15 years of system-level design experience Over 7 years of experience as an application engineer. As a hardware engineer and engineering manager, he has been involved in design in power distribution controls, automotive and fire alarm systems with focus on EMI/EMS issues. Bachelor of science in electrical engineering from Cleveland State University

3 3 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).

4 4 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). Solutions for Innovation

5 5 © 2010 Renesas Electronics America Inc. All rights reserved. 5 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose

6 6 © 2010 Renesas Electronics America Inc. All rights reserved. 6 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose

7 7 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation

8 8 © 2010 Renesas Electronics America Inc. All rights reserved. The Renesas Advantage Renesas MCUs provide a key element in any good low noise design, starting with a low noise MCU

9 9 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q & A

10 10 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Basic Areas of Noise Concern Emissions - Test requirements for Radiated Conducted Susceptibility - Test requirements for : Radiated Conducted Impulse and Transient Supply voltage variations ESD - Test requirements for : Contact discharge Air discharge Signal Integrity (no standards) - user must determine appropriate testing

11 11 © 2010 Renesas Electronics America Inc. All rights reserved. Which noise area is the biggest concern in your design area 1.Emissions 2.Immunity 3.They are both equal 4.ESD

12 12 © 2010 Renesas Electronics America Inc. All rights reserved. Load I Loop Area Magnetic or H - Field emissions are the result of current flow in traces Magnitude of the radiated field received is: EMI = (k * I * F 2 * A)/d – k is a constant based on many physical parameters – I is the current flowing in the loop conductors – F is the frequency of the current – A is the area enclosed by the current carrying conductors H-Field or Differential Radiation

13 13 © 2010 Renesas Electronics America Inc. All rights reserved. E-Field or Common Mode Emissions + noise Noise Source (e.g. Clock Circuit) Return Line (GND) Signal Line Common Mode Noise due to pickup E - Field emissions result due to in-phase currents on two lines or voltage potentials on traces Common mode noises are very effective radiators Sources of common mode noise Noisy grounds Unbalanced signal and return paths

14 14 © 2010 Renesas Electronics America Inc. All rights reserved. EMI Spectrum of a squarewave 9th harmonic reduced 6 dB Above 160 MHz reduced by 12 dB.

15 15 © 2010 Renesas Electronics America Inc. All rights reserved. Crosstalk Driving Device Parasitic Capacitances Parasitic Inductances Receptor Line Transmitter Line Receiving Device Due to parasitic capacitances and inductances Capacitive crosstalk dominant when impedance is high Inductive coupling dominant when impedance is low Decrease line-ground impedance Reduce edge rates

16 16 © 2010 Renesas Electronics America Inc. All rights reserved. Reflection occurs at any discontinuity in impedance Impedance increases reflected pulse adds to incident wave Impedance decreases reflected pulse subtracts from incident wave Wave Reflections

17 17 © 2010 Renesas Electronics America Inc. All rights reserved. Prevent reflection must terminate line Zm//Zi = Zo Transmission line analysis required for “long” lines Impedance Matching Trasmitter Receiver Z0Z0 Zi Z out VsVs ZmZm No Reflection A rule of thumb is a trace can be considered “short” if ratio of tracelength (inches) to risetime (nSec) is <3 (on FR4 board)

18 18 © 2010 Renesas Electronics America Inc. All rights reserved. The same design improvements that counter EMI emissions help reduce EMS susceptibility Keep all signals differential with small current loops Opposite flux lines cancel Minimize common mode signals Very effective radiators Balance signal path lengths and spacing Minimize high frequencies Overshoot Fast edge rates Noise Control for EMI Flux lines equal and opposite + signal return

19 19 © 2010 Renesas Electronics America Inc. All rights reserved. Guidelines to minimize EMS susceptibility Keep all signals differential with small current loops Lines will receive equal noise Balance signal path lengths and spacing Keeps noise pickup common mode Minimize overshoot and fast edge rates Creates cross-talk problems Noise Control for EMS Flux lines equal + noise No Net Voltage Influence

20 20 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q & A

21 21 © 2010 Renesas Electronics America Inc. All rights reserved. Bus Connections Use on-chip Flash and RAM Use serial connections Minimizes EMI sources Minimizes Cross-talk sources

22 22 © 2010 Renesas Electronics America Inc. All rights reserved. System Layout and Design Place current limiting resistors close to MCU Protects MCU Resistor and Trace capacitance form low pass Minimizes EMI from MCU Place Damping/Slew resistors on long leads Slows rise times Damps oscillatory waves Few hundred ohms effective

23 23 © 2010 Renesas Electronics America Inc. All rights reserved. Power and Ground – Net Power Routine Use loop or net power layout Minimizes lead voltage variations Minimizes common mode MCU becomes star point

24 24 © 2010 Renesas Electronics America Inc. All rights reserved. Alternative Power and Ground Routing If net not practical keep Vcc and Ground Parallel Minimizes loop area Balance minimizes common mode

25 25 © 2010 Renesas Electronics America Inc. All rights reserved. Bypassing Place bypass cap as close as possible Minimize loop area Equal distance to Vcc and ground Minimizes common mode Consider multiple capacitors Covers wider frequency spectrum Series Vcc inductance increases performance Both EMI and EMS

26 26 © 2010 Renesas Electronics America Inc. All rights reserved. Selecting Bypass Capacitors

27 27 © 2010 Renesas Electronics America Inc. All rights reserved. Impedance Frequency Capacitor 1 Impedance Capacitor 2 Impedance Expected Resultant Impedance C1 2.2 uF Vcc C2.47 uF Multiple Capacitor Frequency Response Expect resultant impedance less than either capacitor’s impedance Multiple Bypass Capacitors Actual Resultant Impedance

28 28 © 2010 Renesas Electronics America Inc. All rights reserved. Impedance Frequency Capacitor 1 Impedance Capacitor 2 Impedance Actual Resultant Impedance Vcc Line C1 C2 fo Multiple Capacitor Actual Frequency Response When using different value capacitors Use devices with low ESL (Q= XL/ESR) If Q is < 5 should not be problem Greater difference in capacitance more risk Multiple Capacitors – Anti-Resonance

29 29 © 2010 Renesas Electronics America Inc. All rights reserved. Feed-Through Capacitors schematic Equivalent circuit Consider using feed-through capacitor Space is limited Many bypass capacitors required Standard Cap Ckt Frequency

30 30 © 2010 Renesas Electronics America Inc. All rights reserved. Component Selection Start with a robust, low noise MCU

31 31 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q & A

32 32 © 2010 Renesas Electronics America Inc. All rights reserved. Spectrum with TEM Cell Method - 3V, 4MHz R8C/11 MCU-A MCU-B MCU-C KHz dB All MCUs Are Not Equal

33 33 © 2010 Renesas Electronics America Inc. All rights reserved. M32C/83 (30MHz)M16C/62 (16MHz)M16C/80 (20MHz) Emission Noise vs. MCU Frequency Good layout practices can minimize noise even as frequency is increased

34 34 © 2010 Renesas Electronics America Inc. All rights reserved. Start oscillation Static-state oscillation B A B “L” A High Drive Mode Low Drive Mode Controlling Clock Emissions Two level clock drive Adaptive drives PLLs Spread Spectrum H L

35 35 © 2010 Renesas Electronics America Inc. All rights reserved. Vcc GND Vcc GND INOUT INOUT Vcc GND IO Port Design - 1 Control buffer drive capacity Internal buffers and output buffer Control drive signal slew rate

36 36 © 2010 Renesas Electronics America Inc. All rights reserved. Synchronized switching Time-shifted switching Output terminal t1t1 t2t2 t1t1 Vcc GND Control Circuit P-ch N-ch InternalExternal Vcc GND P-ch N-ch IO Port Design - 2 Eliminate dash currents in buffers Control simultaneous switching

37 37 © 2010 Renesas Electronics America Inc. All rights reserved. Vcc GND INOUT Vcc GND INOUT Long Lead length Vcc GND Noise absorption as common mode Parasitic capacitor Wiring inductance Pin layout simplifies putting bypass capacitor at best position Vcc GND Layout Improvements Layout increases internal capacitance No increase in die size Effective bypass cap Layout improves power performance Optimum bypass placement Common mode filter

38 38 © 2010 Renesas Electronics America Inc. All rights reserved. Noise Countermeasures Schmitt devices on inputs Analog RC filters Clamp diodes for overshoot

39 39 © 2010 Renesas Electronics America Inc. All rights reserved. Internal Noise Sources Electrically Separated Supply Lines Internal Power Layout Separate Power Areas Prevents mixing noise sources Allows sizing traces

40 40 © 2010 Renesas Electronics America Inc. All rights reserved. Noise Free/Immune - Low EMI/EMS Control signal lines protected with noise filters and capacitors Power supply ferrite beads placed on the VCC pin MCU M16C Based boardDesign with Non-Renesas MCU

41 41 © 2010 Renesas Electronics America Inc. All rights reserved. Questions?

42 42 © 2010 Renesas Electronics America Inc. All rights reserved. Summary Noise Basics Small current loops Balanced Design Reduce edge rates System Level Countermeasures Good bypassing Balanced routing IC Level Design Countermeasures Start with low noise, robust MCU

43 43 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation

44 © 2010 Renesas Electronics America Inc. All rights reserved. 44 Thank You

45 Renesas Electronics America Inc.


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