1. 1 ITRS Design TWG Test Column Draft 1 Feb. 4, 2001

2. 2 Microprocessors near-term (>100nm) long-term (<100nm) Test ………… Increasing gap between the capacity of DfT/test generation/fault grading tools and today's design complexity Better test tools for advanced fault models (open, delay, etc. faults) Continuation of at-speed functional test with increased clock frequencies At-speed structure test with increased clock frequencies Signal integrity testability (noise, capacitive/inductive coupling, etc) DFT to enable low-cost ATE Non-intrusive BIST for logic Fault diagnosis and design for diagnosability Power and thermal management during test Test-during-Burn-in …… Design for efficient and effective burn-in to screen out infant mortality Timing-related new fault models for defects/noise in ultra deep submicron technologies Quality and yield impact due to test equipment limits

3. 3 High Performance ASIC near-term (>100nm) long-term (<100nm) Test …… Increasing gap between the capacity of DfT/test generation/fault grading tools and today's design complexity Better test tools for advanced fault models (open, delay, etc. faults) Avoiding at-speed functional test At-speed structure test with increased clock frequencies Signal integrity testability (noise, delay, capacitive/inductive coupling) DfT to enable low-cost ATE Logic BIST for advanced fault models Fault diagnosis and design for diagnosability Yield improvement and failure analysis tools and methods Power and thermal management during test Test &on-chip measurement techniques for multi-GHZ serial communications devices Timing-related new fault models for defects/noise in ultra deep submicron technologies Quality and yield impact due to test equipment limits

4. 4 Analog/Mixed-Signal/RF near-term (>100nm) long-term (<100nm) Test …… Fault models for analog (parametric) failures Methods correlating externally measurable quantities to internal defect/parametric failures Analog/Mixed-signal DFT/BIST, especially at higher frequencies (beyond baseband). DfT, BIST and test methods compatible with the SoC core-based environment and constraints. Test and on-chip measurement techniques for multi-gigahertz serial communications devices Test of multi-gigahertz RF front ends on chip Signal integrity test issues caused by noise from digital to analog circuitry Diagnosis and failure analysis for analog/mixed-signal parts

5. 5 System-on-a-chip near-term (>100nm) long-term (<100nm) Test ………… …… Integration of DFT and test methods of core-based designs from multiple sources (including analog, RF) Integration of SoC test methods onto test equipment platform Test methodologies specific to a particular fabric and integrated into the fabric design flow Embedded memory (DRAM, SDRAM, Flash, etc) built-in self-diagnosis and built-in self-repair Test reuse Dependence on self-test solutions for SoC (including RF, analog) System test for SoC Test methods for heterogeneous SoC including MEMS and electro-optical components System-level on-line testing