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Digital Signal Processing and Generation for a DC Current Transformer for Particle Accelerators Silvia Zorzetti
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Contents Introduction Fermilab Direct-current current transformer principles Direct Current Current Transformer (DCCT) Simulink Model Specifications and Parameters Hardware Digital implementation Open loop test Closed loop test
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Introduction This activity was supported and accomplished at Fermilab, in the Instrumentation Department of the Accelerator Division
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Main Injector (MI) Rapid cycling synchrotron 150 GeV as Injector for the Tevatron High intensity protons for fixed target and neutrino physics Recycler Permanent Magnetics 8 GeV Antiproton cooling before the injection into the Tevatron Proton storage Tevatron Superconducting synchrotron 980 GeV Circular Accelerators at Fermilab
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Different types of DCCTs at FNAL An analog, homebrew version was developed at FNAL in the 80’s. Installed in all the machines, except for the Recycler Bandwidth: 2 MHz A commercial DCCT, designed by K. Unser (Bergoz) Entire system, i.e. pickup, electronics, cables, etc. Only DC signal detection (narrow band). In 2004 the system failed due to an asymmetry of permeability between the toroids. Temporary replaced with another commercial DCCT from Bergoz, will finally be replaced by the “digital” DCCT that is now under development.
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DCCT Introduction The DCCT is a diagnostics instrument, used to observe the beam current. Detection of DC and low frequency components of the beam current Non-Distructive instrument For the detection of high frequency components the classical AC transformer is used.
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Principle of Operation - AC Transformer The classical AC transformer can be used to identify the high frequency components of the beam current
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Principle of Operation of the DCCT – Single Toroid The modulator winding drives the toroid into saturation. The total magnetic flux is shifted proportionally to the DC current The measured DC current is proportional to the amplitude of the 2 nd harmonic detected by the detector winding
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Principle of Operation of the DCCT – Double Toroids
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Complete System Beam DCCT Modulator 400Hz digitally supplied Second Harmonic detector AM demodulator on FPGA AC Transformer Sum and Feedback Output
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Second Harmonic Detector Input: The input signal can be viewed as a low frequency signal modulated (in amplitude) with 800Hz
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Second Harmonic Detector CIC1: Perform the first decimation of the signal sampling frequency From 62.5MHz to 500kHz
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Second Harmonic Detector NCO: Supplies in-phase and quadrature-phase signals of same amplitude and frequency (800Hz), for downconversion to baseband
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Second Harmonic Detector CIC2: Performs a second decimation of the sampling frequency, allows a more efficient FIR filter From 500kHz to 2kHz
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Second Harmonic Detector FIR: Defines the overall system bandwidth at baseband DC to 100Hz
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Second Harmonic Detector Some mathematics to format the signal, and adjust gain and phase There is no phase detector required, because the signal is sufficiently slow, thus a signum detector is implemented.
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DCCT Model Analytic study of the DCCT functionality Simulink Model of the complete system (AC+DC) Toroids behaviour simulation Filter Design Feedback
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Simulink Model
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Simulink Model – Flux at Ib=0 (a.u.)
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Simulink Model – Output Voltage at Ib=0
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Simulink Model – Flux at Ib=1 (a.u.)
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Simulink Model – Voltage Output at Ib=1
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Simulink Model – AC + DC Closed Loop
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Required Specifications and Parameters Number of turns per winding Current and Voltage to saturate the toroids DCCT Bandwidth AC Bandwidth
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Parameter Space Toroids Saturation I sat <3A, V sat =36V, N m =22 AC and DC Sensor windings B DC =100Hz B AC =1MHz N s_DC =100 N s_AC =200
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Test Setup for Toroid Measurements
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Output Voltage from the pick-up windings of the toroids There is a mismatch between the voltage outputs from the two toroids. Poor matching of the core material
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Complete System
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VHDL Implementation – CIC M: Differential Delay ρ : Decimation factor N: Filter Order A: Gain Notch at:
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CIC Filter – VHDL Model The firmware is synchronized with a single clock Integration Section Comb Section Gain Number of bits:
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Filters – Test Setup
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VHDL Implementation and Test– CIC1 f s =62.5MHz, f d =500kHz, M=1 ρ=125 N=2 f 1 =500kHz A= 15625
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VHDL Implementation and Test– CIC2 f s =500kHz, f d =2kHz, M=2 ρ=250 N=2 f 1 =1kHz A= 250000
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VHDL Implementation and Test– FIR b i : filter coefficients N: filter order (127)
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FIR Filter- VHDL Model The firmware is synchronized with a single clock Counter ROM Serial Function Number of bits
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VHDL Implementation and Test- FIR f s =2kHz, f c =100Hz, N=127
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VHDL Impelementation and Test – AM Demodulator With a waveform generator a low frequency signal, modulated at 800Hz is generated and digitized by the ADC The resulting output signal is observed on an oscilloscope, connected to the DAC.
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VHDL Implementation and Test- Demodulator Input: Output:
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Open Loop Test Measurement Setup
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DC Dectector - Output signal Before the Transition Board - Ib=0.4A The signal is supplied by the DCCT DC Sense Before the transition board There are both odd and even harmonics
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DC Detector - Output Signal After the Transition Board - Ib=0.4A The signal is supplied by the DCCT DC Sense Passed by the Transition Board Has only the 2 nd harmonic (800 Hz), the 1 st harmonic is suppressed.
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Open Loop Result
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Closed Loop Test Measurement Setup
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Closed Loop Results
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Conclusions At this stage a preliminary implementation and test of the DCCT has been successfully realized. P control τ =0.05s Resolution 0.01A Next steps Implementation of the AC section Faster loop control
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Thank you for your attention Silvia Zorzetti
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Backup Slides Silvia Zorzetti
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