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Seminar II: Rendering Architectures Yan Cui Love Joy Mendoza Oscar Kozlowski John Tang
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Contents Graphics Pipeline Current Consumer Renderer Architectures Parallelisation of Rendering Pipeline Synchronisation issues in parallelisation Parallel and Cluster Architectures examples
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Graphics Pipeline Geometric Transformation Mapping of triangles from a 3D coordinate system (object space) to a 2D coordinate system (image space). Rasterisation Converts transformed triangles into pixel values to be shown on the computer screen.
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Graphics Pipeline Model and Viewing Transform Lighting Projection Transform Clipping Perspective Division Viewport Mapping Modelling transformation positions primitives with respect to each other. Viewing transformation orients the resulting primitives to the user viewpoint. Evaluates the colour of the vertices. Projects objects onto the screen Hides primitives not included in the viewing frustrum. Converts the vertex to Cartesian coordinates.Performs final scaling and translation. Geometric transformation
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Graphics Pipeline Alpha Blending Rasterisation Texture Mapping Depth Test Scan Conversion Decomposes triangle into a set of pixels & calculates the attributes of each pixel. Wraps a 2D texture image on the surface of a 3D object. Compares the value of the current pixel against the depth value of the pixel at the corresponding XY coordinate of the frame buffer. Colour of old & new pixels is composited according to their alpha value.
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Consumer PC Architecture GeForce 7800 GTX Clock Freq. 430Mhz 256Mb DDR3 VRAM 24 Pixel Shaders 8 Vertex Shaders Over 300 billion floating point operations per sec. 44.4 Gb/s Texture bandwidth
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Parallelisation Parallel architectures –Multiple processors/renderers on a close-proximity, low-latency bus –Becoming common in consumer market currently: HyperThreading SLI Cluster Architecture –Multiple computers networked –Use of low cost, consumer PC’s “SGI Graphics Cluster™: The Cluster Architecture Challenges, the SGITM Solution”, SGI, 2001
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Parallelisation Strategies - Sort middle Natural way to parallelise No overhead on geometry computation Access to renderer memory required –Specialised renderers required Network requirements depend on: –Number of primitives –Amount of overlap between tiles
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Parallelisation Strategies - Sort first Extra bounding box calculation Overhead on geometry computation and rasterisation due to primitives overlapping multiple screen tiles –However, temporal coherence Consumer renderers useable Lower network usage Load balancing difficult
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Parallelisation Strategies - Sort last No overhead in geometry and rasterisation Load balancing easily possible High-bandwidth network required –Sparse: send only rendered pixels –Full: send full image Compositor design is difficult Transparency is almost impossible Anti-aliasing is very expensive
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Synchronisation issues All rendering pipelines must have synchronised input data –Implied for shared memory parallel system –Cluster architectures require same solution as distributed databases All rendering pipelines must synchronise render output depending on display type –Not needed for polarised display Failure to synchronise results in incorrect rendered image SWAPBUFFERS
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Dynamic data synchronization Two types of dynamic data: –control information, –changing/dynamic data set information Dynamic Data generated from raw real time Stimulus Data i.e. input devices SYNC: Ensure images on each node are computed on coherent data sets. Block until everyone accepts stimulus data
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Video Synchronisation Output to a Display driven by Signal from each graphics card Signal provides: –Display Image –Synchronisation SYNC: Ensure video signals are synchronised Signal and it’s synchronisation are not something that can be controlled via software on commodity graphics cards
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Video Synchronisation Genlock (high-end apps) –Most precise way of ensuring synchronisation –Here the graphics system ensures pixel-level synchronisation by using a PLL to lock onto the line rate to derive the pixel rate (or pixel clock) –Lock is fine enough to allow phase adjustments for each pixel Frame Lock (low-end apps) –Less-precise method –Synchronises once per frame at the end of the blanking period
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Cluster Architecture Pixel Planes –Heterogeneous multi-computer system –Parallel processors
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Cluster Architecture Each PixelPlanes renderer unit consists of
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PixelPlanes Render Rendered in 1 second
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Parallel Architecture Silicon Graphics InfiniteReality architecture –third-generation graphics system –designed to deliver 60Hz steady frame rate high- quality rendering of complex scenes –support for OpenGL –boardset consists of 3 distinct board types: Geometry Raster memory Display generator
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InfiniteReality Architecture Geometry pipeline Geometry distributor (sort-middle) Rasteriser
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InfiniteReality Render
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Clustering System Examples Stanford's Chromium Toolkit Fraunhofer Institute for Industrial Engineering IAO's HiPI-6 (mature installation) ARS Electronica ARSBox (commercial) Solutions based on VRJuggler (opensource) –ClusterJuggler –NetJuggler Unreal Tournament CAVE
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Summary Graphics Pipeline PC, Parallel and Cluster architectures Clusters of consumer Graphics cards starting to replace specialised parallel architectures due to cost and availability Parallelisation strategies –Sort-middle –Sort-first –Sort-last Issues of synchronisation and how to resolve –Input data synchronisation –Output render synchronisation
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Further Reading “Three-dimensional computer graphics Architecture”, Mitra et Al., 2000 “An Overview of Cluster Solutions for Immersive Displays”, Steed et. al, (http://www.cs.ucl.ac.uk/staff/a.steed/cluster- solutions-with-figures.htm)http://www.cs.ucl.ac.uk/staff/a.steed/cluster- solutions-with-figures.htm SGI Graphics Cluster™: The Cluster Architecture Challenges, the SGI™ Solution (http://www.sgi.com/products/legacy/pdf/architecture.pdf)http://www.sgi.com/products/legacy/pdf/architecture.pdf
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