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1Auger - North / October 2005 J-M.Brunet, S.Colonges, B.Courty, Y.Desplanches, L.Guglielmi, G.Tristram APC Laboratory – CNRS / IN2P3.

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Presentation on theme: "1Auger - North / October 2005 J-M.Brunet, S.Colonges, B.Courty, Y.Desplanches, L.Guglielmi, G.Tristram APC Laboratory – CNRS / IN2P3."— Presentation transcript:

1 1Auger - North / October 2005 J-M.Brunet, S.Colonges, B.Courty, Y.Desplanches, L.Guglielmi, G.Tristram APC Laboratory – CNRS / IN2P3

2 2Auger - North / October 2005 Board features CPU ARM core Home made power supply: flexibility(1 or 2 batt, 8V to 34V), low cost Power control system: fully configurable (‘analog’ PLD) Slow Control (SPI devices): – 8 DACs /12 Bits –32 ADCs /12 Bits –28 configurable digital I/O SDRAM 128 Mo USB Key flash memory (with Linux system) Low cost/consumption new Cyclone II FPGA : Time Tagging, FE interface/trigger, IP cores … GPS connection (Models in study) Telecom port (RS232, USB,...?)

3 3Auger - North / October 2005 CPU Core ARM920T based microcontroller (80 MHz i/o / 180 MHz core) several interrupts USB ports: 1(2) UHP (host) and 1 UDP several UARTs 4 SPI (for Slow Control and boot ROM) Serial Synchronous Controller: high speed serial line up to 20/40 Mb/s Time Counters JTAG port (In-Situ Test facility with boundary scan) SDRAM controller Data Bus (32) & Address (26) Optional Ethernet (for software development) with an external PHY

4 4Auger - North / October 2005 Board diagram ARM Microcontroller FPGA CycloneII TTAG, FE, ext. GPS Module Slow Control SDRAM 64/128Mo PHY Config SPI 1PPS Serial JTAG Telecom Console System on USB key Ethernet Bus SSC ITs Front End Connector, LVDS Extension connector Power Supply

5 5Auger - North / October 2005 Cost and Power consumption Price (euro) Consumption (mW) AT91RM9200 10 (CPU) 250 EP2C35F484C6 50 (CycloneII FPGA) 800 USBKEY128Mo 15 (system flash) HYB39S512160AT-7.5 (x2) 50 (system memory) 500 SC and LF components 40 res, capa, osc, conn, other 100 150 GPS M12+ 100 (less than) 300 Power Supply 30 *1.3 ---------------------------------------------------------------------------------------- Total 395 2600 mW (Contains PS, CPU, TTAG, GPS, SC, LF, FE dig. trigger) PCB + Assembly (prod) 100 (estimated) Total495 Missing : analog FE, PMTs, COMMs, integration UB alone: 500 E

6 6Auger - North / October 2005 Hardware status and schedule  Dvlpt Kit evaluated and used > 1 year  Physic specification needed, e.g. event tagging, size, …  Home made Power Supply : Prototype in qualification  Station controller board:  Conception done  Routing easy (serial buses, FPGA)  Prototype: end 2005  use ‘south’ GPS receiver  Cyclone Firmware : in progress.  Home made fake Front End board for test: spring 2006 (south site like) Anyhow, we are designing and building a prototype: missing specs replaced by ‘south’ specs.

7 7Auger - North / October 2005 Software Development Tools Cross compilation / PC Linux: gnuarm (asm, gcc, c++...) GDB for Linux process. (gdb on host and gdb-server on target). JTAG/ICE probe (BDI2000) with GDB for the kernel. OpenEmbedded. Tools to create a full Linux base for various embedded systems. (Use by OpenZaurus, Familiar, OpenSIMPad, OpenSlug...) EMBEDDED (RT) Linux is the Base Line

8 8Auger - North / October 2005 Embedded Linux Distribution and Real Time Currently, we use a "Linux From Scratch" based on Busybox v1.0 ( 7Mo used ). Other distributions may also be used : OpenEmbedded based, Montavista, etc… Adeos portage done (with home made patch).  Adeos is a kernel patch allowing easy intercept of IRQs and events before (or after) the Linux kernel and, if necessary, to pass them to the kernel (Pipeline). Adeos is the core of the new RTAI version. We measured a latency between 5 and 10 us. RTAI : An official version for Arm920T exists, but temporarily only on one sub-architecture (EP9301). Possibility to use the Fast Interrupt (FIQ) “outside” the Linux Kernel.

9 9Auger - North / October 2005 Software Status Drivers Available –SPI –RTC –Ethernet/TCPIP –MTD (flash memory access). –USB (host/device ports, USB key). –Compact Flash interface. –Timers Counters (module with Adeos) has been developed and tested: periodic tasks on IRQ of different TC. –Internal DMA (tested with SSC). –SSC (module with Adeos) : tested up to 30Mhz. –Driver for I2C (TWI) exists, must be tested. –Kernel 2.6(.12) for AT91RM9200 is in development. In test.

10 10Auger - North / October 2005 Software Status Boot –Boot on flash. –Boot via tftp (Ethernet) –Boot on Compact Flash Card. –Boot on USB Key. Acquisition –To be Done ! –New architecture (from OS9000 to Linux) –Comms ?

11 11Auger - North / October 2005 The future of the AT91RM9200 Development around the AT91RM9200 is very active, specially with Linux. There are several commercial boards (Cogent for example), and Windows CE BSP also supports the AT91RM9200DK. It seems that, for embedded systems, the number of ARM processors has overtaken the number of x86 and PPC processors (source: LinuxDevice.com and WindowsForDevices.com, March 2005) If Auger North delayed, new (but similar) products will appear –Faster –Lower consumption –….

12 12Auger - North / October 2005 Pending questions Front End –Sample Rate 100 MHz ? –Time window ? GPS Receiver –Where is M12 ? Cant find it any longer ! –Galileo ? COMMS ? –Band width Memory size Transfer rate CPU power Interface Software Interface Software (TCP-IP ?)


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