Download presentation
Presentation is loading. Please wait.
Published byDwayne Craig Modified over 9 years ago
1
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads 主講人:虞台文
2
Content Kernel Definitions and Objects Queue Structures Threads Implementing Processes and Threads – Process and Thread Descriptors – Implementing the Operations Implementing Sync/Comm Mechanisms – Semaphores and Locks – Building Monitor Primitives – Clock and Time Management – Communications Kernel Interrupt Handling
3
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Kernel Definitions and Objects
4
Windows Kernel
5
Hardware dependent functions are placed in the kernel.
6
OS Kernel A basic set of objects, primitives, data structures, processes from which the remainder of the system may be built on its top. In other words, the kernel transforms the hardware into an OS’s machine.
7
OS’s Machine I am staying on the top of an OS machine.
8
Kernel Objects Kernel defines/provides mechanisms to implement various policies. Four classes of possible functions and objects in a kernel: – Process and thread management – Interrupt and trap handling – Resource management – Input/output
9
Kernel Objects Process and thread management Interrupt and trap handling Resource management Input/output Process and thread management – Process Creation – Process Destruction – Process Communication/Synchronization
10
Kernel Objects Process and thread management Interrupt and trap handling Resource management Input/output Interrupt and trap handling – Responding to signals triggered by various system events. Some system events: – Process termination – I/O completion – Time-out of clock – Error – Hardware malfunction
11
...... Done Kernel Objects Process and thread management Interrupt and trap handling Resource management Input/output Interrupt and trap handling – Responding to signals triggered by various system events. CPU I/O Processor I/O Processor Start I/O Interrupt...... Do_I/O...... Interrupt Service Routine
12
Kernel Objects Process and thread management Interrupt and trap handling Resource management Input/output Resource management – Primitives for maintaining, allocating, and releasing system resources. Some system resources: – CPUs – Timers – Main memory – Secondary storage – I/O devices – Files
13
Kernel Objects Process and thread management Interrupt and trap handling Resource management Input/output – Read, write, and control operations for initiating and supervising the transfer of data between I/O devices and main memory or registers.
14
Main Topics in the Lecture Process and thread management Interrupt and trap handling Resource management Input/output Main topics
15
Process Creation Hierarchy Kernel psps psps p1p1 p1p1 pnpn pnpn q1q1 q1q1 qmqm qmqm... OS process user 1 login pjpj pjpj user j loginuser n login user processes application processes. child processes Interaction with kernel objects
16
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Queue Structures
17
Queues OS needs many different queues – e.g., ready queues, wait queues. Single-level queues – Implemented as array Fixed size Efficient for simple FIFO operations – Implemented as linked list Unbounded size More overhead, but more flexible operations
18
Single-Level Queues Circular Array Implementation Link List Implementation
19
Priority Queues Array indexed by priority
20
Priority Queues Binary heap of priority
21
Priority Queues Binary heap of priority Array implementation of binary heap
22
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Threads
23
Memory Address Spaces Virtual Memory Lowest Address, e.g., 00000000 Highest Address, e.g., FFFFFFFF
24
Memory Address Spaces Virtual Memory Lowest Address, e.g., 00000000 Highest Address, e.g., FFFFFFFF OS User Programs Starting Address of all processes
25
Processes OS User Programs User Programs Only one process can be activated at a time. OS Process 1 OS Process 2 OS Process n Each process thinks that it owns all memory. Their address spaces are different.
26
Context Switching OS User Programs User Programs Only one process can be activated at a time. OS Process 1 OS Process 2 OS Process n Each process thinks that it owns all memory. Context Switching Context Switching
27
Context Switching OS User Programs User Programs Only one process can be activated at a time. OS Process 1 OS Process 2 OS Process n Each process thinks that it owns all memory. The context switching among processes, i.e., to change address space, is very time consuming.
28
OS User Programs User Programs OS Process 1 OS Process 2 OS Process n Threads Each process can have multiple threads. They share the same address space. The context switching among threads in the process is efficient. Lightweight process Mesa
29
Processes and Threads
30
Process has one or more threads All threads in a process share: – Memory space – Other resources Each thread has its own: – CPU state (registers, program counter) – Stack Threads are efficient, but lack protection from each other
31
OS Support for Processes/Threads Create a new Process/threadProcessthread Initiate or make a thread ready Destroy or terminate a thread Delay or put a thread to sleep for a given amount of time Synchronize threads through semaphore, events, or condition variables Perform lower-level operations, such as blocking, suspending, or scheduling a thread. Microsoft Windows Process & Thread Functions
32
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Implementing Processes and Threads
33
Process and Thread Descriptors System needs some data structures to keep track the state and miscellaneous information, e.g., identification, resources used, accounting information, of processes and treads. In the following, we are dealing with a system composed solely of processes, much of concept will also apply to threads.
34
Process Control Block (PCB)
35
Process Identification A system-wide unique identifier.
36
State Vector
37
CPU’s State Contain necessary data, e.g., program counter, data register, and flag register, to restart the process at the point of last interruption. Contain necessary data, e.g., program counter, data register, and flag register, to restart the process at the point of last interruption.
38
Processor ID To identify the processor that is executing the process. Make sense only for multiprocessor system.
39
Memory Memory map information. Physical Memory Virtual Memory Memory map information. Physical Memory Virtual Memory
40
Status
41
running ready blocked Point to the list, e.g., ready list or wait list, on which the process may reside.
42
More on Status Basic process status – running, ready, and blocked State transition diagram ready blocked running Scheduler Request Release Create
43
Process Activation and Suspension Some applications require a process (or thread) can be suspended by programs. For examples – Suspension of a debugging program – Needed by the internal, e.g., to detect or prevent a deadlock. Suspend Thread Resume Thread
44
The Finer State Transition Diagram
45
Active Processes Suspended Processes
46
Creation Tree
47
Point to the PCB of the parent process. A link list of PCBs of the child processes
48
Priority Used by scheduler to decide which process should be running next. Two methods: Single-integer value Two-leveled valued – Base priority + Changeable part
49
Priority Two methods: Single-integer value Two-leveled valued – Base priority + Changeable part Windows NT priority classes
50
Others CPU time used Time remaining Resource used Resource claimed Resource quotas Number of I/O requests since creation...
51
Processes and Threads (Windows 2000) Process Object Handle Table VAD object Virtual Address Space Descriptors Access Token Thread... Access Token
52
Windows 2000 (EPROCESS) Executive Process
53
Kernel Process Block
54
Processes and Threads (Windows 2000) EPROCESS ETHREAD
55
Windows 2000 (ETHREAD)
56
Kernel Thread Block
57
Windows 2000 Thread States
58
Implement Operations on Processes Create – Establish a new process Destroy – Remove one or more process Suspend – Change process status to suspended Activate – Change process status to active cobegin/coend forall fork/join/quit......
59
Implement Operations on Processes Create – Establish a new process Destroy – Remove one or more process Suspend – Change process status to suspended Activate – Change process status to active Operating on PCBs CSs must be cared
60
Create
61
Create(s0, m0, pi, pid) { p = Get_New_PCB(); pid = Get_New_PID(); p->ID = pid; p->CPU_State = s0; p->Memory = m0; p->Priority = pi; p->Status.Type = ’ready_s’; p->Status.List = RL; p->Creation_Tree.Parent = self; p->Creation_Tree.Child = NULL; insert(self-> Creation_Tree.Child, p); insert(RL, p); Activate(); Scheduler(); } s0 m0 pi pid = Get_New_PID(); ready_s RL selfNULL Get_New_PCB();
62
Create Create(s0, m0, pi, pid) { p = Get_New_PCB(); pid = Get_New_PID(); p->ID = pid; p->CPU_State = s0; p->Memory = m0; p->Priority = pi; p->Status.Type = ’ready_s’; p->Status.List = RL; p->Creation_Tree.Parent = self; p->Creation_Tree.Child = NULL; insert(self-> Creation_Tree.Child, p); insert(RL, p); Activate(); Scheduler(); } The calling process
63
Create Create(s0, m0, pi, pid) { p = Get_New_PCB(); pid = Get_New_PID(); p->ID = pid; p->CPU_State = s0; p->Memory = m0; p->Priority = pi; p->Status.Type = ’ready_s’; p->Status.List = RL; p->Creation_Tree.Parent = self; p->Creation_Tree.Child = NULL; insert(self-> Creation_Tree.Child, p); insert(RL, p); Activate(); Scheduler(); }
64
Suspend
65
Suspend ( ) Suspend? We choose not.
66
Suspend Suspend(pid) { p = Get_PCB(pid); s = p->Status.Type; if ((s==’blocked_a’)||(s==’blocked_s’)) p->Status.Type = ’blocked_s’; else p->Status.Type = ’ready_s’; if (s==’running’) { cpu = p->Processor_ID; p->CPU_State = Interrupt(cpu); Scheduler(); } Suspend(pid) { p = Get_PCB(pid); s = p->Status.Type; if ((s==’blocked_a’)||(s==’blocked_s’)) p->Status.Type = ’blocked_s’; else p->Status.Type = ’ready_s’; if (s==’running’) { cpu = p->Processor_ID; p->CPU_State = Interrupt(cpu); Scheduler(); } } returns all registers’ values of the cpu and frees the cpu.
67
Activate
68
Activate ( ) Activate? We choose not.
69
Activate Activate(pid) { p = Get_PCB(pid); if (p->Status.Type == ’ready_s’) { p->Status.Type = ’ready_a’; Scheduler(); } else p->Status.Type = ’blocked_a’; } Activate(pid) { p = Get_PCB(pid); if (p->Status.Type == ’ready_s’) { p->Status.Type = ’ready_a’; Scheduler(); } else p->Status.Type = ’blocked_a’; }
70
Destroy We need to release all resources associated with the process. What special action needs to be taken if the process is running?
71
Destroy Destroy ( ) Killed? We choose to kill child processes.
72
Kill_Tree(p) { for (each q in p->Creation_Tree.Child) Kill_Tree(q); if (p->Status.Type == ’running’) { cpu = p->Processor_ID; Interrupt(cpu); } Remove(p->Status.List, p); Release_all(p->Memory); Release_all(p->Other_Resources); Close_all(p->Open_Files); Delete_PCB(p); } Kill_Tree(p) { for (each q in p->Creation_Tree.Child) Kill_Tree(q); if (p->Status.Type == ’running’) { cpu = p->Processor_ID; Interrupt(cpu); } Remove(p->Status.List, p); Release_all(p->Memory); Release_all(p->Other_Resources); Close_all(p->Open_Files); Delete_PCB(p); } Destroy subroutine Kill_Tree ( ) killed Marked the corresponding cpu free.
73
Kill_Tree(p) { for (each q in p->Creation_Tree.Child) Kill_Tree(q); if (p->Status.Type == ’running’) { cpu = p->Processor_ID; Interrupt(cpu); } Remove(p->Status.List, p); Release_all(p->Memory); Release_all(p->Other_Resources); Close_all(p->Open_Files); Delete_PCB(p); } Kill_Tree(p) { for (each q in p->Creation_Tree.Child) Kill_Tree(q); if (p->Status.Type == ’running’) { cpu = p->Processor_ID; Interrupt(cpu); } Remove(p->Status.List, p); Release_all(p->Memory); Release_all(p->Other_Resources); Close_all(p->Open_Files); Delete_PCB(p); } Destroy subroutine Kill_Tree ( ) killed
74
Destroy Destroy ( ) Destroy(pid) { p = Get_PCB(pid); Kill_Tree(p); Scheduler(); } Destroy(pid) { p = Get_PCB(pid); Kill_Tree(p); Scheduler(); }
75
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Implementing Sync/Comm Mechanisms
76
General Resource Access Scheme Semaphores, locks, monitors, messages, time, and other hardware and software objects are considered resources. Request(res) { if (Free(res)) Allocate(res, self) else { Block(self, res); Scheduler(); } } Release(res) { Deallocate(res, self); if (Process_Blocked_in(res,pr)) { Allocate(res, pr); Unblock(pr, res); Scheduler(); } }
77
Implementing Semaphores/Locks CPU usually doesn’t support P and V operations directly. Test-and-Set instruction supported mostly – It atomically tests and modifies the contents of a memory location. – It can be used to implement general semaphores in multiprocessor systems. In uniprocessor systems, it is sufficient to disable interrupts before accessing a semaphore.
78
The Story (80x86) Memory
79
The Story (80x86) Memory Access resource Access resource
80
The Story (80x86) Memory Access resource Access resource Lock XCHG
81
The Story (80x86) Memory Access resource Access resource
82
The Story (80x86) Memory Access resource Access resource Lock XCHG The spin locks
83
The Story (80x86) Memory Access resource Access resource Lock XCHG Job Done The spin locks
84
The Story (80x86) Memory Access resource Access resource Job Done The spin locks
85
The Story (80x86) Memory Access resource Access resource Job Done Lock XCHG The spin locks
86
Test-and-Set CPU Instruction TS(R, X) A CPU Register A Memory Location (Lock Value) R = X; X = 0; Read (test) lock value Lock (set) the lock 0: locked is locked 1: locked is unlocked Returns the value in R. The lock is always locked after being called. Indivisible Atomic
87
Spin Locks on Binary Semaphore Request( res ) { if (Free(res)) Allocate(res, self) else { Block(self, res); Scheduler(); } Release( res ) { Deallocate(res, self); if (Process_Blocked_in(res,pr)) { Allocate(res, pr); Unblock(pr, res); Scheduler(); } sb {0, 1}
88
Spin Locks on Binary Semaphore Request( res ) { if (Free(res)) Allocate(res, self) else { Block(self, res); Scheduler(); } } Release( res ) { Deallocate(res, self); if (Process_Blocked_in(res,pr)) { Allocate(res, pr); Unblock(pr, res); Scheduler(); } } sb {0, 1} Pb Vb Sb Sb==1 Sb=1; Sb=0; wait until Sb==1
89
Spin Locks on Binary Semaphore sb {0, 1} Pb(Sb) { do TS(R, Sb) while(!R); /* wait loop */ } Vb(Sb) { Sb=1; }
90
Spin Locks on Binary Semaphore sb {0, 1} Pb(Sb) { do TS(R, Sb) while(!R); /* wait loop */ } Vb(Sb) { Sb=1; }
91
General Semaphores w/ Busy Wait P(s) { Inhibit_Interrupts; Pb(mutex_s); s = s-1; if (s < 0) { Vb(mutex_s); Enable_Interrupts; Pb(delay_s); } Vb(mutex_s); Enable_Interrupts; } V(s) { Inhibit_Interrupts; Pb(mutex_s); s = s+1; if (s <= 0) Vb(delay_s); else Vb(mutex_s); Enable_Interrupts; }
92
Disallowing Preemption High Priority e.g., ISR High Priority e.g., ISR Low Priority Shared Resource Low Priority
93
High Priority e.g., ISR High Priority e.g., ISR Low Priority Dead Lock Condition Shared Resource Low Priority
94
High Priority e.g., ISR High Priority e.g., ISR Low Priority Dead Lock Avoidance Shared Resource Windows uses different implementations.
95
Disallowing Preemption P(s) { Inhibit_Interrupts; Pb(mutex_s); s = s-1; if (s < 0) { Vb(mutex_s); Enable_Interrupts; Pb(delay_s); } Vb(mutex_s); Enable_Interrupts; } V(s) { Inhibit_Interrupts; Pb(mutex_s); s = s+1; if (s <= 0) Vb(delay_s); else Vb(mutex_s); Enable_Interrupts; } Disallowed to be preempted by a higher-priority process.
96
Interrupt Inhibition P(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s-1; if (s < 0) { Vb(mutex_s); Enable_Interrupts;; Pb(delay_s); } Vb(mutex_s); Enable_Interrupts;; } V(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s+1; if (s <= 0) Vb(delay_s); else Vb(mutex_s); Enable_Interrupts;; }
97
Uniprocessor P(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s-1; if (s < 0) { Vb(mutex_s); Enable_Interrupts;; Pb(delay_s); } Vb(mutex_s); Enable_Interrupts;; } V(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s+1; if (s <= 0) Vb(delay_s); else Vb(mutex_s); Enable_Interrupts;; }
98
Busy Wait P(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s-1; if (s < 0) { Vb(mutex_s); Enable_Interrupts;; Pb(delay_s); } Vb(mutex_s); Enable_Interrupts;; } V(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s+1; if (s <= 0) Vb(delay_s); else Vb(mutex_s); Enable_Interrupts;; }
99
Avoiding Busy Wait P(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s-1; if (s < 0) { Block(self, Ls); Vb(mutex_s); Enable_Interrupts;; Scheduler(); } else { Vb(mutex_s); Enable_Interrupts; } } V(s) { Inhibit_Interrupts;; Pb(mutex_s); s = s+1; if (s <= 0) { Unblock(q, Ls); Vb(mutex_s); Enable_Interrupts; Scheduler(); } else{ Vb(mutex_s); Enable_Interrupts; }; }
100
Implementing Monitors (Hoare) Internal Data Condition Variables Procedure 1 Procedure 2 Procedure 3 c.wait c.signal mutually exclusive access for processes Need a mutex, say mutex. Need a semaphore for processes blocked on c, say condsem_c. Need a semaphore for signaling processes, say urgent. condcnt_c : #processes wait on c urgentcnt : #signalers Initial values: mutex = 1; condsem_c = 0; urgent = 0; condcnt_c = 0; urgentcnt = 0;
101
Mutual Access of Processes monitor QueueHandler{ struct Queue queue; condition itemAvail, freenodeAvail; void AddToQueue( int val ) { if ( queue is full ) { freenodeAvail.wait; }... add val to the end of the queue... itemAvail.signal; } /* AddToQueue */ int RemoveFromQueue() { if ( queue is empty ) { itemAvail.wait; }... remove value from queue... freenodeAvail.signal; return value; } /* RemoveFromQueue */ }; monitor QueueHandler{ struct Queue queue; condition itemAvail, freenodeAvail; void AddToQueue( int val ) { if ( queue is full ) { freenodeAvail.wait; }... add val to the end of the queue... itemAvail.signal; } /* AddToQueue */ int RemoveFromQueue() { if ( queue is empty ) { itemAvail.wait; }... remove value from queue... freenodeAvail.signal; return value; } /* RemoveFromQueue */ }; Initial values: mutex = 1; condsem_c = 0; urgent = 0; condcnt_c = 0; urgentcnt = 0;
102
Mutual Access of Processes monitor QueueHandler{ struct Queue queue; condition itemAvail, freenodeAvail; void AddToQueue( int val ) { if ( queue is full ) { freenodeAvail.wait; }... add val to the end of the queue... itemAvail.signal; } /* AddToQueue */ int RemoveFromQueue() { if ( queue is empty ) { itemAvail.wait; }... remove value from queue... freenodeAvail.signal; return value; } /* RemoveFromQueue */ }; monitor QueueHandler{ struct Queue queue; condition itemAvail, freenodeAvail; void AddToQueue( int val ) { if ( queue is full ) { freenodeAvail.wait; }... add val to the end of the queue... itemAvail.signal; } /* AddToQueue */ int RemoveFromQueue() { if ( queue is empty ) { itemAvail.wait; }... remove value from queue... freenodeAvail.signal; return value; } /* RemoveFromQueue */ }; P(mutex) if(urgentcnt) V(urgent); else V(mutex); if(urgentcnt) V(urgent); else V(mutex); Initial values: mutex = 1; condsem_c = 0; urgent = 0; condcnt_c = 0; urgentcnt = 0;
103
Mutual Access of Processes Procedure_body P(mutex) if(urgentcnt) V(urgent); else V(mutex); Initial values: mutex = 1; condsem_c = 0; urgent = 0; condcnt_c = 0; urgentcnt = 0;
104
condcnt_c = condcnt_c + 1; if (urgentcnt) V(urgent); else V(mutex); P(condsem_c); /* wait */ condcnt_c = condcnt_c - 1; wait/signal c.wait: c.signal: Initial values: mutex = 1; condsem_c = 0; urgent = 0; condcnt_c = 0; urgentcnt = 0; if (condcnt_c) { urgentcnt = urgentcnt + 1; V(condsem_c); P(urgent); /* wait */ urgentcnt = urgentcnt - 1; }
105
Clock and Time Management Why OS needs time? – Performance measurement – Processor Scheduling – Time-Stamping Events e.g., I/O and file system call – Deadlock and other fault detection –........
106
Clock and Time Management Most systems provide hardware – ticker: issues periodic interrupt – countdown timer: issues interrupt after a set number of ticks Build higher-level services with this h/w Wall clock timers – Typical functions: Update_Clock : increment tnow (invoked each time tick) Get_Time : return current time Set_Time(tnew) : set time to tnew – Must maintain monotonicity
107
Countdown Timer (Alarm Clocks) Processes or threads may need timeout signal at some specified time in the future. Examples: – Delay an amount of time to wait I/O completion – Sleep to hand over CPU time – Block until awakened by timer signal events Typical Function: – Delay(tdel) block process for tdel time units
108
Implementation of Delay(tdel) To block process for tdel time units. Implementation using hardware countdown: semaphore delsem; Delay(tdel) { Set_Timer(tdel); /*set hardware timer*/ P(delsem); /*wait for interrupt*/ } Timeout() { /*called at interrupt*/ V(delsem); }
109
Logical Countdown Timers Implement multiple logical countdown timers using a single hardware timer Functions: – tn = Create_LTimer() create new timer – Destroy_LTimer(tn) – Set_LTimer(tn, tdel) logically equivalent to Set_Timer(tdel) How to implement multiple logical timers?
110
Priority Queue with Absolute Wakeup Times Set_LTimer(tn, tdel) 103 Wall-clock 12 Countdown Hardware Timers p1p1 115 p2p2 135 p3p3 140 p4p4 150 Timer Queue TQ
111
Priority Queue with Absolute Wakeup Times Set_LTimer(??, 35) 103 Wall-clock 12 Countdown Hardware Timers p1p1 115 p2p2 135 p3p3 140 p4p4 150 Timer Queue TQ p5p5 138 p3p3 140 p4p4 150 p1p1 115 p2p2 135 TQ +103 +138
112
Priority Queue with Absolute Wakeup Times 103 Wall-clock 12 Countdown Hardware Timers p5p5 138 p3p3 140 p4p4 150 p1p1 115 p2p2 135 TQ 104 11 105 10 106 9 9 107 8 8 108 7 7 109 6 6 110 5 5 111 4 4 112 3 3 113 2 2 114 1 1 115 0 0
113
p2p2 135 Priority Queue with Absolute Wakeup Times Wall-clock Countdown Hardware Timers p5p5 138 p3p3 140 p4p4 150 p2p2 135 TQ 115 0 0 135 -115 20
114
Priority Queue with Time Differences 12 Countdown Hardware Timer p1p1 15 p2p2 20 p3p3 5 p4p4 10 Timer Queue TQ Set_LTimer(tn, tdel)
115
Priority Queue with Time Differences 12 Countdown Hardware Timer Set_LTimer(??, 35) p5p5 3 p3p3 2 p4p4 10 p1p1 15 p2p2 20 TQ 12 32 37 47 35 32 p1p1 15 p2p2 20 p3p3 5 p4p4 10 Timer Queue TQ
116
Priority Queue with Time Differences 12 Countdown Hardware Timers p5p5 3 p3p3 2 p4p4 10 p1p1 15 p2p2 20 TQ 11 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0 0
117
Priority Queue with Time Differences Countdown Hardware Timers p5p5 3 p3p3 2 p4p4 10 p2p2 20 0 0 TQ 20
118
Memory Process q Process p OS Communication Primitives Address space for process q Address space for process p System Space User Space The same physical memory used. Different physical memory used. Assume that the communication processes are in the same machine.
119
OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p Communication send/receive Communication send/receive send/receive can be blocked or nonblocked.
120
OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p send(p,m) sbuf receive(q,m) rbuf send/receive can be blocked or nonblocked.
121
OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p send(p,m)receive(q,m) send/receive can be blocked or nonblocked. sbuf rbuf sbuf rbuf Different address mappings for p and q. How?
122
send(p,m) OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p send(p,m) send/receive can be blocked or nonblocked. sbuf sbuf’
123
send(p,m) OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p receive(q,m) send/receive can be blocked or nonblocked. sbuf rbuf sbuf’ rbuf’
124
send(p,m) OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p receive(q,m) send/receive can be blocked or nonblocked. sbuf rbuf sbuf’ rbuf’
125
send(p,m) OS Process q Process q Process p Process p Communication Primitives Address space for process q Address space for process p receive(q,m) send/receive can be blocked or nonblocked. sbuf rbuf sbuf’ rbuf’
126
Communication Primitives Copying through system buffers (Processes in the same machine) Use pool of system buffers
127
Communication Primitives Use pool of system buffers Copying accross network (Processes in the different machines)
128
Operating Systems Principles Process Management and Coordination Lecture 4: The Operating System Kernel: Implementing Processes and Threads Interrupt Handling
129
Why Interrupt Handling? Many events occur at an unpredictable time, i.e., asynchronously – Polling is impractical – Transfer of control out of normal process temporarily upon coming of an event and, then, back. To remove the notion of asynchronous events from higher levels of kernel, the OS, and applications – Process abstraction: processes are almost to have independent activities and operating in parallel. – For example, OS and applications don’t deal with I/O completion event directly. The program to serve interrupt is called interrupt handler (IH) or interrupt service routine (ISR).
130
Types of Interrupt External Interrupts – Generated by hardware – Asynchronous – E.g., I/O completion, time-out, the arrival of message (network card), … Internal Interrupts – Generated by software – Synchronous – E.g., Exceptions (instruction errors), SVC We deal with hardware interrupt in the following.
131
Interrupt Controller (82C59A)
132
to CPU Signaled By I/O Devices Signaled By I/O Devices Interrupt requests are priority-leveled. IH’s of high-priority events can preempt those of lower priority. Interrupt requests are maskable. 80x86 uses STI and CLI to temporarily enable and disable all interrupts, respectively.
133
Interrupt Handling CPU INT Interrupt Controller (e.g., 8259) Interrupt Controller (e.g., 8259) IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 Each interrupt has an interrupt service routine (ISR). ISR7:.......... IRET ISR7:.......... IRET ISR6:.......... IRET ISR6:.......... IRET ISR5:.......... IRET ISR5:.......... IRET ISR4:.......... IRET ISR4:.......... IRET ISR3:.......... IRET ISR3:.......... IRET ISR2:.......... IRET ISR2:.......... IRET ISR1:.......... IRET ISR1:.......... IRET ISR0:.......... IRET ISR0:.......... IRET Normal Job stack
134
Interrupt Handling CPU INT Interrupt Controller (e.g., 8259) Interrupt Controller (e.g., 8259) IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 Each interrupt has an interrupt service routine (ISR). ISR7:.......... IRET ISR7:.......... IRET ISR6:.......... IRET ISR6:.......... IRET ISR5:.......... IRET ISR5:.......... IRET ISR4:.......... IRET ISR4:.......... IRET ISR3:.......... IRET ISR3:.......... IRET ISR2:.......... IRET ISR2:.......... IRET ISR1:.......... IRET ISR1:.......... IRET ISR0:.......... IRET ISR0:.......... IRET Normal Job Put the value of flag register, and program counter (PC) into the stack. PC (*) flag * stack
135
Interrupt Handling CPU INT Interrupt Controller (e.g., 8259) Interrupt Controller (e.g., 8259) IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 Each interrupt has an interrupt service routine (ISR). ISR7:.......... IRET ISR7:.......... IRET ISR6:.......... IRET ISR6:.......... IRET ISR5:.......... IRET ISR5:.......... IRET ISR4:.......... IRET ISR4:.......... IRET ISR3:.......... IRET ISR3:.......... IRET ISR2:.......... IRET ISR2:.......... IRET ISR1:.......... IRET ISR1:.......... IRET ISR0:.......... IRET ISR0:.......... IRET Normal Job Read Interrupt Vector flag * ISR3: Push used registers (PUSHA)....................... Pop used registers (POPA) Return from interrupt (IRET) ISR3: Push used registers (PUSHA)....................... Pop used registers (POPA) Return from interrupt (IRET) PC (*) stack
136
Interrupt Handling CPU INT Interrupt Controller (e.g., 8259) Interrupt Controller (e.g., 8259) IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 Each interrupt has an interrupt service routine (ISR). ISR7:.......... IRET ISR7:.......... IRET ISR6:.......... IRET ISR6:.......... IRET ISR5:.......... IRET ISR5:.......... IRET ISR4:.......... IRET ISR4:.......... IRET ISR3:.......... IRET ISR3:.......... IRET ISR2:.......... IRET ISR2:.......... IRET ISR1:.......... IRET ISR1:.......... IRET ISR0:.......... IRET ISR0:.......... IRET Normal Job flag * ISR3: Push used registers (PUSHA)....................... Pop used registers (POPA) Return from interrupt (IRET) ISR3: Push used registers (PUSHA)....................... Pop used registers (POPA) Return from interrupt (IRET) PC (*) stack
137
Interrupt Handling CPU INT Interrupt Controller (e.g., 8259) Interrupt Controller (e.g., 8259) IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 Each interrupt has an interrupt service routine (ISR). ISR7:.......... IRET ISR7:.......... IRET ISR6:.......... IRET ISR6:.......... IRET ISR5:.......... IRET ISR5:.......... IRET ISR4:.......... IRET ISR4:.......... IRET ISR3:.......... IRET ISR3:.......... IRET ISR2:.......... IRET ISR2:.......... IRET ISR1:.......... IRET ISR1:.......... IRET ISR0:.......... IRET ISR0:.......... IRET Normal Job PC (*) stack
138
Standard Interrupt Handing Sequence 1. Save state of interrupted process/thread 2. Identify interrupt type and invoke IH 3. IH services interrupt 4. Restore state of interrupted process (or of another one if the interrupt for awakening a waiting process)
139
...... Done The Typical Sequence for Using a Hardware Device CPU I/O Processor I/O Processor Start I/O Interrupt...... Do_I/O...... Interrupt Service Routine
140
The Typical Sequence for Using a Hardware Device
141
start I/O
142
Synchronization Primitives Needed P/V wait/signal
143
Monitor: Object-Oriented Approach Device Driver Implemented Using monitor Called by the processes need to do I/O. Called while I/O completion.
144
Implementing Using Monitor
145
Example: Monitor Clock Server
146
monitor Clock_Server { int tnow; Update_Clock() {... tnow = tnow + 1; /* Perhapes update time structure also */ } int Get_Time() {... return(tnow); /* Perhaps return some more complex structure instead */ } Set_Clock(int tnew) {... tnow = tnew; } }
Similar presentations
© 2024 SlidePlayer.com. Inc.
All rights reserved.