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N33-6 NSS2006 Development of a TCP/IP Processing Hardware 1,2) Tomohisa Uchida and 2) Manobu Tanaka 1) University of Tokyo, Japan 2) High Energy Accelerator.

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Presentation on theme: "N33-6 NSS2006 Development of a TCP/IP Processing Hardware 1,2) Tomohisa Uchida and 2) Manobu Tanaka 1) University of Tokyo, Japan 2) High Energy Accelerator."— Presentation transcript:

1 N33-6 NSS2006 Development of a TCP/IP Processing Hardware 1,2) Tomohisa Uchida and 2) Manobu Tanaka 1) University of Tokyo, Japan 2) High Energy Accelerator Research Organization (KEK), Japan

2 N33-6 NSS2006 Outline Introduction Introduction –Advantages using network technologies –Why we did develop? Implementation Implementation –A test board. Measurement Measurement –Transfer Speed. –Power Consumption. Conclusion Conclusion We call the hardware SiTCP.

3 N33-6 NSS2006 Introduction There are advantages using Network technologies. There are advantages using Network technologies. –High Flexibility, –High Connectivity, –Various Commodity Products, –Standard OSs Support Standard Protocols, –Easy Maintenance. It is essential in back-end systems It is essential in back-end systems It has not been sufficiently adopted in front-end systems.

4 N33-6 NSS2006 Why did we develop ? Front-end devices have constraints; Front-end devices have constraints; –Small Hardware size, –Low Power-Consumption, –High Speed Data-Transfer. In Order to Satisfy These Constraints, We Have Developed SiTCP. We Tried to adopt it but Encountered Problems.

5 N33-6 NSS2006 Features Small Hardware size Small Hardware size –Implemented on an FPGA Small Power Consumption Small Power Consumption –< 730mW –System Clock is 25MH z with 100BAST-T. High Transfer-Speed High Transfer-Speed –Line Utilization of TCP data is about 95%. –Reach to The Theoretical Limit. Simple External Interface Simple External Interface –Like a Sync. FIFO-Memory-device.

6 N33-6 NSS2006 Implementation RJ45 Ethernet PHY SMSC LAN83C185 Test Board SiTCP on It In order to measure performance, We developed a Test board. ~2,000 Slices (40% logic resources) are used FPGA Xilinx XC3S500E Small Size

7 N33-6 NSS2006 Block Diagram of the FPGA SiTCP Test-Data Generator Test-Data Checker MII Tx data Rx data Test data are incremental numbers. MII (Media Independent Interface) is specified by IEEE802.3. is specified by IEEE802.3.

8 N33-6 NSS2006 Measurement Confirmed capability to communicate a PC Confirmed capability to communicate a PC –Using a Linux OS. –With a Simple Application Program Using Standard SOCKT() functions Using Standard SOCKT() functions Receiving only Receiving only Measured Transfer Speed Measured Transfer Speed –From a SiTCP (Test board) to a PC

9 N33-6 NSS2006 Measurement Setup ACK # Logger RS232C 100BASE-T RX-PC Extracts TCP ACK #s from packets Tap Test Board Send The Last TCP ACK # Every 200 ms Generates Test Data LINUX 2.4 ACK # Extractor A Packet is copied and Forwarded to The Extractor.

10 N33-6 NSS2006 Calculate Line Utilization Transfer Speed Transfer Speed –Calculate from logged ACK #s –ACK # is logged every 200 ms. Utilization Ratio Utilization Ratio = Transfer-Speed / 100 Mbps (100BASE-T is employed)

11 N33-6 NSS2006 Result Reaches The Theoretical Limit Theoretical Limit Utilization Ratio (%) Power Consumption < 730 mW (The whole board)

12 N33-6 NSS2006 Conclusion Enough Performance for Front-end Devices Enough Performance for Front-end Devices –High-Speed Data Transfers 95% (Line Utilization of TCP data) 95% (Line Utilization of TCP data) –Small Hardware Size 41% logic resources are used of XC3S500E 41% logic resources are used of XC3S500E –Low Power Consumption < 730 mW (The Whole Board) < 730 mW (The Whole Board) SiTCP enables Front-end devices to adopt Network-technologies. We have developed the TCP/IP processing hardware (SiTCP).

13 N33-6 NSS2006 Supplemental Slides

14 N33-6 NSS2006 Sequence Number Data SN=2017 SN=2018 SN=2019 SN=3050 SendingOrder A TCP packet All Data of TCP are numbered by a sender. by a sender. Data SN=2016 SN=2015 The sender sent a SN of first data. SN=3051

15 N33-6 NSS2006 Acknowledge Number Data SN=2017 SN=2018 SN=2019 SN=3050 The Receiver sent back the expecting next SN As ACK #. ReceivingOrder A TCP packet ACK # = 3051 Data SN=2016 SN=2015 SN=3051 Check the SN. The Receiver is Expecting

16 N33-6 NSS2006 Measurement Setup ACK # Logger RS232C 100BASE-T RX-PC Extract TCP ACK #s from RX-PC packets Tap Test Board Send a TCP ACK # Every 200 ms Generates Test Data LINUX 2.4 ACK # Extractor A Packet is copied and Forwarded to The Extractor.

17 N33-6 NSS2006 Transfer Capability Test Transfer Rates of Both Directions Measured Transfer Speed Measured Transfer Speed –Between SiTCPs –Both directions –Simultaneously

18 N33-6 NSS2006 Capability Test Transfer Data of Both Directions RS232C 100BASE-T Ethernet Tap TCP Client TCP Server ACK # Logger X 2 ACK # Extractor

19 N33-6 NSS2006 Line Utilization between SiTCPs Server → ClientClient → Server Avg. Utilization ~ 95% (95 Mbps) Stable

20 N33-6 NSS2006 Comparison to A Standard Implementation An Standard Implementation An Standard Implementation –Using an FPGA Protocols are processed Protocols are processed –on an FPGA, –Using an Embedded CPU, –With a Standard OS Linux Linux SUZAKU board SUZAKU board –One of the standard implementations.

21 N33-6 NSS2006 SUZAKU board A Product of Atmark Techno Inc.,Japan A Product of Atmark Techno Inc.,Japan FPGA FPGA –XC3S1000 (Xilinx Inc.) CPU CPU –Microblaze, Xilinx Inc. –Embedded in an FPGA uClinux uClinux Consists of an FPGA, an Ethernet Controller chip, a Flash Memory, a DRAM.

22 N33-6 NSS2006 Setup ACK # Extractor Ethernet Hub RS232C 100BASE-T RX PC Ethernet Tap SUZAKU board ACK # Logger

23 N33-6 NSS2006 Utilization Ratio Max. Utilization ~ 3% Utilization Ratio (%)


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