1. PIT Programming Examples Working with the modes of PIT

2. The output in this mode is initially low, and will remain low for the duration of the count if GATE = 1. Width of low pulse = N  T Where N is the the clock count loaded into counter, and T is the clock period of the CLK input. Mode 0: interrupt on terminal count

3. When the terminal count is reached, the output will go high and remain high until a new control word or new count number is loaded. In this mode, if GATE input becomes low at the middle of the count, the count will stop and the output will be low. The count resumes when the gate becomes high again. This in effect adds to the total time the output is low. Mode 0: interrupt on terminal count

7. This mode is also called hardware triggerable one-shot. The triggering must be done through the GATE input by sending a 0- to-1 pulse to it. The following two steps must be performed: 1.Load the count registers. 2.A 0-to-1 pulse must be sent to the GATE input to trigger the counter. Contrast this with mode 0, in which the counter produces the output immediately after the counter is loaded as long as GATE = 1. In mode 1 after sending the 0-to-1 pulse to GATE, OUT becomes low and stays low for a duration of N  T, then becomes high and stays high until the gate is triggered again. Mode 1: programmable one- shot

10. Mode 2 is also called divide-by-N counter. In this mode, if GATE = 1, OUT will be high for the N  T clock period, goes low for only one clock pulse, then the count is reloaded automatically, and the process continues indefinitely. Mode 2: rate generator

12. In this mode if GATE = 1, OUT is a square wave where the high pulse is equal to the low pulse if N is an even number. In this case the high part and low part of the pulse have the same duration and are equal to (N/2)  T (50% duty cycle) If N is an odd number, the high pulse is one clock pulse longer. This mode is widely used as a frequency divider and audio-tone generator. Mode 3: square wave rate generator

15. In this mode if GATE = 1, the output will go high upon loading the count. It will stay high for the duration of N  T. After the count reaches zero (terminal count), it becomes low for one clock pulse, then goes high again and stays high until a new command word or new count is loaded. To repeat the strobe, the count must be reloaded again. Mode 4 is similar to mode 2, except that the counter is not reloaded automatically. In this mode, the count starts the moment the count is written into the counter. Mode 4: software trigger strobe

18. Mode 5: hardware trigger strobe This mode is similar to mode 4 except that the trigger must be done with the GATE input. In this mode after the count is loaded, we must send a low-to-high pulse to the gate to start the counter.

21. The following method of creating hardware time delays was first implemented in the IBM PC and compatible computers. To create a processor independent delay, IBM made PB4 of port 61H toggle every 15.085  s. CS holds 15.085  s in the following codes. Time delays in 80x86 IBM PC

23. Now a time delay of any duration can be created regardless of the CPU frequency as long as it is a 286 and higher PC. For example set CX=33144 (33144  15.085  s=0.5 second) MOVCX, 33144 CALLWAITF Time delays in 80x86 IBM PC

25. Example

26. Examples

27. As mentioned earlier, counter 2 is connected to the speaker and it can be programmed to output any frequency that is desired. Look at the list of piano notes and their frequencies given in Fig. 5-5. Music: frequency and time duration Generating Music on the IBM PC

30. A delay of 250 ms

35. Shape of 8253/54 Outputs

36. IBM BIOS programmed counter 0 to create mode 3, which is square-wave shape. Counter 0 is loaded with the number 65,536 and the clock period of input frequency 838 ns (1/1.193 MHz = 838 ns), so the period of the OUT0 pulse is equal to 65536  838 ns = 54.9 ms (18.2 Hz). OUT0 continuously sends out square wave pulses. Out0 pulse shape in IBM BIOS

37. IBM BIOS programmed counter 1 in mode 2, rate generator, with the value 18 loaded into the counter. OUT1 will be high for a total of 17  838 ns and go low for one pulse of 838 ns GATE1 is set to 1 permanently Out1 pulse shape in the IBM BIOS

38. IBM BIOS loads the value 1331 into counter 2. Since 1331 is an odd number, the OUT2 pulse is high for a total of (1331+1)/2 = 666  838 ns and is low for a total of (1331-1)/2 = 665  838 ns OUT2 pulse shape in the IBM BIOS

39. Sample Questions Preparation for Mid-Term Exam Microprocessors I

40. Assembly Language Determine the Value of AX After the following Instructions : MOVAX, 2345H MOVBX, 5432H ADDAX, BX;7777H MOVAL, BH;7754H MOV AX, 2345H MOV BX,1357H PUSH AX PUSH BX INC SP POP AX ; 4513 MOVAX, 2345H RORAL,1 ; 23A2 ADCAH,5 ; 29A2 MOVAX, 9245H RORAL,1;92A2 RCLAH,1;25A2

41. Developing Simple Programs BCD to Hex Conversion SI : BCD Source, DI: Hex Destination, CX: Size Hex to BCD Conversion SI : Hex Source, DI: BCD Destination, CX: Size Common Divisor of two natural Numbers IsPrime A^B Arithmetic Operations for Big Natural Numbers Start Address in SI, Size in CX Operations: +, Difference, *, /, %

42. Using Special Interrupts Get a Number from user, find its divisors, show it to user Write the Term “Hello” in a color box in the center of the screen with borders. Use edge character codes for borders Navigate the cursor on screen

43. System Design A Minimum System with 64k EPROM and 64K RAM Peripherals: One 8259 as Master and 3 8259 Slave (Main Addresses: 40H, 60H, 80H, C0H) Three PPI (Main Addresses: 20H, A0H, E0H) ALL PPIs Can Cause Interrupt Through Master First PPI Controls 4 Stepper Motors Second PPI is for Display Controller

44. System Programming Develop a Program that drives the stepper motors with equal rpm Digital Display Driver Interrupt of a timer (Every 10 ms with a 555)