1. Fall 2006 1 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Senior Design Lecture 12 Change control, Funding Design Review Milestone

2. Fall 2006 2 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Change control Team completes change form: description, reason, impact Submits it to CCB CCB reviews request CCB responds with approval (or not) Team responds to approval

3. Fall 2006 3 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Change control assignments CCB receives requests, approves changes MonthMember 1Member 2 NovemberZigzagBridgeport DecemberEnterpriseHelix JanuaryPilot RockBoring FebruaryBeavermarshGlide MarchSublimity Zigzag AprilEnterpriseHelix

4. Fall 2006 4 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Change request form Date Title of Request Description (What is it you want to change?) Reason (Why is it you want to make a change?) Impact (What is affected by the proposed change and how?)

5. Fall 2006 5 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Funding process Submit budget to instructor Instructor/Dept. Head responds with approval Reimbursements –Review policy –Advisor approves by initialing budget and receipt –Submit budget/receipts to Debbie Speer

6. Fall 2006 6 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Funding requests Requests for School funding due Friday, November 10 Complete spreadsheet and email to instructor, one-per-team Results available Friday, November 17

7. Fall 2006 7 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Funding Spreadsheet Each project budgeted for $200

8. Fall 2006 8 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering School policy on funding Project becomes UP property Funding limit of $200 Budget must be approved prior to any reimbursement Reimbursement requires the receipt and advisors approval Debbie Speer receives reimbursement request

9. Fall 2006 9 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Design review milestone Final Fall semester deliverable Design complete: discipline-specific meaning Checklist reviewed for completeness Some assurance that design will work Go/NoGo for detailed implementation

10. Fall 2006 10 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering DR process Collateral list and material prepared Checklist completed Checklist reviewed in an approval meeting Design status: approved, conditionally approved, not approved Follow-up: minutes, action items, re-schedule of meeting for conditional or not approved status

11. Fall 2006 11 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering DR approval status Approved: everything verified Conditionally approved –One or two minor items not verified (but easily fixed) –Requires specific action item(s) to resolve Not approved –One major and/or several minor items not verified –Requires specific action item(s) to resolve

12. Fall 2006 12 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering DR checklist sections General requirements: already discussed Software systems Digital systems Integrated circuits Control systems Other technologies? Each project is unique

13. Fall 2006 13 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Software systems?

14. Fall 2006 14 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Digital systems?

15. Fall 2006 15 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Integrated circuits?

16. Fall 2006 16 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Control systems?

17. Fall 2006 17 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering

18. Fall 2006 18 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Software systems E/R and UML diagrams complete User interface friendly Error handling defined Module interface defined List of constraints, req, inputs, outputs Initial conditions Check for size

19. Fall 2006 19 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Software systems, continued. Program meets reqs Versions defined IDE defined Maintainable Security checks Schedule in place

20. Fall 2006 20 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Digital systems Size and cost Power req Timing (AC) Pin count and definition Fan-out, fan-in Logic family compatibility Part availability and cost

21. Fall 2006 21 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Digital systems, continued. Initial conditions, resets State diagram Excitation equations Buffering Block diagram, hierarchical HDL compatible Metastability checked

22. Fall 2006 22 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Integrated circuits Initial conditions, reset Number of pins Min capacitance, inductance, resistance Timing analysis Floorplan OK Checking.tpr file Heat analysis

23. Fall 2006 23 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Integrated circuits, continued. Manufacturability Design rule checks Power req Parasitic analysis Gate count ESD and static Technology

24. Fall 2006 24 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Integrated circuits, continued. Package type Interface definitions EMC concerns

25. Fall 2006 25 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Control systems Initial conditions Inputs, outputs defined Stability OK, damping Data integrity S/N ratio checked System block diagram Transfer function

26. Fall 2006 26 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Control systems, continued. Response times Component transfer functions Avoid harmonics Sensor definitions, xfer functions Gain and phase margin Freq constraints