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King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department.

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Presentation on theme: "King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department."— Presentation transcript:

1 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 1 COE 308 Lectures 5: Multiplication & Division

2 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 2 COE 308 Multiplication Algorithm School Age Algorithm 852 x 456 6 x 852 x 10 0 5 x 852 x 10 1 4 x 852 x 10 2 + Multiply the product by the order of the digit (x 10 i ) Single Digit Multiplication Multiplication by a power of the base (10 i ) is a Shift Left by i positions Multiple Additions Algorithm: Compute Partial Products Multiply Multiplicand by EACH DIGIT of Multiplier Add Partial Products

3 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 3 COE 308 Multiplication in Binary 11010110 x 10011 1 x 11010110 x 2 0 1 x 11010110 x 2 1 0 x 11010110 x 2 2 0 x 11010110 x 2 3 1 x 11010110 x 2 4 + Because there are only two digits in binary (0 and 1). The multiplication algorithm becomes only: Add the Shifted Multiplicands Shift Multiplicand Multiply Shifted Multiplicand by 1 or 0 Easy to Implement A x 1 = A; A x 0 = 0 Addition of many operands? Issue: How to add more than two operands at the same time ?

4 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 4 COE 308 Adding Partial Products Issue: How to add more than two operands at the same time ? bits 012012 30 31 Multiplier Multiplicand 00000000h (0 on 32 bits) 31 + + + + Uses many Adders Need circuit that uses one to few adders because of size limitations Parallel Multipliers are used in high performance, multiplication intensive, architectures like DSP (Digital Signal Processing). TOO EXPENSIVE

5 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 5 COE 308 Iterative Solution Full Parallel Multiplier is too expensive Solution Iteratively add the partial products Advantages Uses ONE Adder Only Inconvenients Much Slower than Parallel Multiplication Circuit

6 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 6 COE 308 First Multiplication Algorithm Shift Right Shift Left Multiplicand Multiplier 64-bit ALU Product Write 64 bits 32 bits Control test Shift the Multiplicand Left to realize the multiplication by the order of the digit Shift the Multiplier right to get out each digit LSB first and MSB last Control the write of the product register to only add partial products corresponding to a multiplier digit equal to 1 Add the product register content to every potential partial product (shifted multiplicand) all the time. Result is only written when appropriate

7 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 7 COE 308 First Multiplication Algorithm(2) Start Bit 0 of Multiplier = 0 ? Product  Product + Multiplicand Shift Left Multiplicand with 1 bit Shift Right Multiplier with 1 bit 32 nd Repetition? Done =0=1 No: < 32 repetitions Yes: 32 repetitions

8 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 8 COE 308 Multiplication Circuit Improvement Current Circuit has 64-bits Multiplier Register used to shift the Multiplier. –Shifting the Multiplier means inserting 0s (known value). Reserving bits for holding known values is a waste of resources –Anytime, Register contains 32 data bits and 32 0s. –100% overhead just to shift 64-bits Adder is not necessary because: –Addition is done between two 32 bits operands Either add lower bits of product with lower 0s of the shifted multiplier Or add the higher bits of the product which are 0s with the leading bits of the shifted multiplicand Need to Reduce the cost of the Multiplication Circuit

9 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 9 COE 308 Analogy Multiplication Method is the same. Two Ways of Implementing the same algorithm 1.Shift the Multiplicand register forward and do not shift the Product register (what we have seen so far) 2.Shift the Product register backward and do not shift the Multiplicand register (the other method) Similar to having two methods of making a moving scene in a movie

10 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 10 COE 308 Movie Making Tips Is The Car Moving Forward or the Trees moving Backward ???

11 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 11 COE 308 Method 1 The Car is Moving Forward The Camera/Observer is attached to the car

12 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 12 COE 308 Method 2 The Car is a Fake Car. The Camera/Observer and the Fake Car are both fixed The trees are pictures fixed on a moving panel

13 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 13 COE 308 Shifting Backwards 1010110 1010110. + 0000000.. 0000000... 1010110.... 100000010 + + 0100000010 + 11001100010 1010110 10011 x 1010110 0000000 + 1010110 + 0000000 1010110 100000010 + 0100000010 + 00100000010 + 11001100010 1010110 10011 x 1010110 0000000 +  01010110  0100000010  00100000010 0000000  000100000010 Shift Multiplicand Left No Shift for the Product No Shift for the Multiplicand Shift the Product Right (Backward) MultiplicandMultiplier Product Product Initial Mcand x 1 Shiftd 0 bits Mcand x 1 Shiftd 1 bits Mcand x 0 Mcand x 1 Shiftd 4 bits Product Initial Mcand x 1 Sh. Product Right Mcand x 1 Sh. Product Right Mcand x 0 Sh. Product Right Mcand x 0 Sh. Product Right Mcand x 1

14 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 14 COE 308 Shift Right Multiplicand Multiplier 32-bit ALU Product Write 64 bits 32 bits Control test Second Multiply Algorithm Shift Right

15 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 15 COE 308 Start Bit 0 of Multiplier = 0 ? Product[63:32]  Product[63:32] + Multiplicand Shift Right Product with 1 bit Shift Right Multiplier with 1 bit 32 nd Repetition? Done =0=1 No: < 32 repetitions Yes: 32 repetitions Second Multiply Algorithm (2)

16 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 16 COE 308 Another Improvement –The lower 32-bits 0s are shifted out as the Product register is shifted right –Only the Upper 32-bits are added to the Multiplicand –Initialize the 64-bit Product Register with 0s In Second Multiplication Algorithm: Merge the lower 32-bits of Product Register with Multiplier Register

17 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 17 COE 308 Third Multiply Algorithm Multiplier Register merged with lower 32 bits of Product register Multiplicand 32-bit ALU Product Write 64 bits 32 bits Control test Shift Right

18 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 18 COE 308 Third Multiply Algorithm (2) Start Bit 0 of Product = 0 ? Product[63:32]  Product[63:32] + Multiplicand Shift Right Product with 1 bit 32 nd Repetition? Done =0=1 No: < 32 repetitions Yes: 32 repetitions

19 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 19 COE 308 Signed Multiplication Convert multiplier and multiplicand into positive numbers Perform the multiplication Compute the sign of the product Apply the sign to the product by either complementing the product ( 0)

20 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 20 COE 308 Booth’s Algorithm Principle: Minimization of Intermediate Additions by Virtually reducing multiplier 0 1 1 1 1 0 End of run Middle of run Beginning of run ii+3i+2i+1 Normal Method: Product = Product + Mcand.(2 i+3 + 2 i+2 + 2 i+1 + 2 i ) Booth’s Method: Product = Product + Mcand. (2 i+4 -2 i ) Current BitBit to the rightRunOperation 10Beginning of a run of 1sSubtract Multiplicand 11Middle of a run of 1sDo Nothing 01End of a run of 1sAdd Multiplicand 00Middle of run of 0sDo nothing

21 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 21 COE 308 Multiplication in MIPS Separate pair of 32 bits registers to contain the 64-bit product –Hi and Lo: 32 bits each. Result of multiplication instructions always in Hi:Lo –2 instructions to move the result from Hi/Lo to MIPS registers: mflo and mfhi 2 Multiply instructions –mult: signed multiplication –multu: unsigned multiplication

22 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 22 COE 308 Division 82721 8 < 21 8272182 > 21 Find biggest digit d (from 1 to 9) which satisfies: 82 >= 21 x d Determine d using: Intuition (Guessing) when performed by a Human Algorithm that increases d until Either d x 21 > 82; use (d-1) Or d = 9 82 > 21x1 82 > 21x2 82 > 21x3 82 < 21x 4 Use (4-1) = 3 82721 39 - 63 197 197 > 21x1 …………………… 197 > 21x8 197 > 21x9 Use 9 - 189 8 Select One digit from Dividend to compare to Divisor Smaller than Divisor, Consider Two digits

23 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 23 COE 308 Division Algorithm (in Decimal) M = Leftmost Digit of Dividend M >= Divisor Shift Left Next Digit of Dividend into M No Yes d = 1 Shift Left Next Digit of Dividend into M M <= d x Divisor d = 9 No d = d + 1 No d = d - 1 M = M – (d x Divisor) Shift in d into Q No More Digits in Dividend Yes No M: Remainder Q: Quotient Start Define M: temporary storage Define Q: Quotient Q = 0 Done

24 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 24 COE 308 Division in Binary 001100111011 000000010101 Many steps before finding a number > Divisor Presence of leading 0s disturbs the conventional algorithm 000000011001 Extract digits from Dividend and Shift them to align them with Divisor Every step the Extracted Digits are compared to the Divisor: If Divisor x 1 > Extracted Digits  Shift in 0 in the Quotient If Divisor x 1 <= Extracted Digits  Shift in 1 in the Quotient - 000000010101 000000000100 000000100110 000001000111 - 000000010101 000000010001 000000100011 - 000000010101 000000001110 000000011101 - 000000010101 000000001000 In binary, d can only take the value 0 or 1. Means: Divisor x d <= Extracted Digits from Dividend  d = 1 Quotient Register: Shift Left Serial In from LSB Method of Extracting Digits from Dividend not Practical in Context of Logic Circuits

25 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 25 COE 308 Forced Alignment To Force the Alignment of the Dividend and the Divisor: Multiply the Divisor by 2 n (Shift Left by n), n being the number of bits of both the Dividend and the Divisor Shift right (divide by 2) the Divisor until Divisor <= Dividend 000000010101000000000000 000000000000001100111011 000000001010100000000000 000000000101010000000000 000000000010101000000000 000000000001010100000000 000000000000101010000000 000000000000010101000000 000000000000001010100000 < 0>= 0 Rest of the Algorithm Remains the Same

26 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 26 COE 308 First Division Algorithm Shift Left Shift right Divisor Quotient 64-bit ALU Remainder Write 64 bits 32 bits Control test

27 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 27 COE 308 First Division Algorithm (2) Start Test Remainder Shift Quotient to left setting the new rightmost bit to 1 Shift Right Divisor with 1 bit 33 rd Repetition? Done Remainder < 0 No: < 33 repetitionsYes: 33 repetitions Remainder  Remainder - Divisor Remainder ≥ 0 Restore original value of Remainder Remainder  Remainder + Divisor Shift Quotient to left setting the new rightmost bit to 1

28 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 28 COE 308 Division Algorithm Improvement Current Circuit has 64-bits Divisor Register used to shift the Divisor. –Shifting the Divisor means inserting 0s (known value). Reserving bits for holding known values is a waste of resources –Anytime, Register contains 32 data bits and 32 0s. –100% overhead just to shift 64-bits ALU is not necessary because: –Subtraction is done between two 32 bits operands (after alignment of Divisor and Dividend) Need to Reduce the cost of the Division Circuit

29 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 29 COE 308 Shifting Dividend Forward Shifting the Divisor Backward (Right) and Fixing the Dividend/Remainder is equivalent to: Fixing the Divisor and Shifting the Dividend/Remainder Forward (Left) Similar to the Analogy made in improving the Multiplication Algorithm In Second Method: Dividend/Remainder Register still 64-bits, initialized with Dividend aligned right with upper 32-bits initialized to 0 Divisor Register is reduced to 32-bits and is not shifted.

30 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 30 COE 308 Second Division Algorithm Shift Left Divisor Quotient 32-bit ALU Remainder Write 64 bits 32 bits Control test Shift Left

31 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 31 COE 308 Another Improvement In Second Algorithm: Remainder Register upper 32-bits initialized to 0s Remainder Register is shifted left 32 times. 0s are inserted in the LSB of the Remainder Register Lower 32 bits end-up with 0s Quotient Register: 32-bit LSB serial-in left shift register Data is progressively shifted-in in the Quotient Register Merge the lower 32-bits of Remainder Register with Quotient Register

32 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 32 COE 308 Final Division Algorithm Divisor 32-bit ALU Remainder Write 64 bits 32 bits Control test Shift Right Shift Left

33 King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department College of Computer Science And Engineering College of Computer Science And Engineering Multiplication & Division 33 COE 308 Division in MIPS Separate pair of 32 bits registers to contain the 64-bit remainder: –Hi and Lo: 32 bits each. –Lo: Contains Quotient –Hi: Contains Remainder –2 instructions to move the result from Hi/Lo to MIPS registers: mflo and mfhi 2 Divide instructions –div: signed division –divu: unsigned division


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