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12015-10-151Zhongguo Liu_Biomedical Engineering_Shandong Univ. Biomedical Signal processing Chapter 6 structures for discrete- time system Zhongguo Liu Biomedical Engineering School of Control Science and Engineering, Shandong University 山东省精品课程《生物医学信号处理 ( 双语 ) 》 http://course.sdu.edu.cn/bdsp.html
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2 6.0 Introduction 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations 6.2 Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations 6.3 Basic Structures for IIR Systems 6.4 Transposed Forms 6.5 Basic Network Structures for FIR Systems §6 structures for discrete-time system
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3 Structures for Discrete-Time Systems 6.0 Introduction
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4 Characterization of an LTI System: Impulse Response z-Transform: system function Difference Equation converted to a algorithm or structure that can be realized in the desired technology, when implemented with hardware. Structure consists of an interconnection of basic operations of addition, multiplication by a constant and delay 6.0 Introduction → Frequency response
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even if we only wanted to compute the output over a finite interval, it would not be efficient to do so by discrete convolution since the amount of computation required to compute y [n] would grow with n. 5 Example: find the output of the system Illustration for the IIR case by convolution IIR Impulse Response with input x[n]. Solution1:
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6 Example: find the output of the system computable recursively The algorithm suggested by the equation is not the only computational algorithm, there are unlimited variety of computational structures (shown later). with input x[n]. Solution2:
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7 Why Implement system Using Different Structures? Equivalent structures with regard to their input-output characteristics for infinite-precision representation, may have vastly different behavior when numerical precision is limited. Effects of finite-precision of coefficients and truncation or rounding of intermediate computations are considered in latter sections. Computational structures(Modeling methods): Block Diagram Signal Flow Graph
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8 Structures for Discrete-Time Systems 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations
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9 + x 1 [n] x 2 [n] x 1 [n] + x 2 [n] Adder x[n] a ax[n] Multiplier x[n] x[n-1] z1z1 Unit Delay (Memory, storage) Three basic elements: M sample Delay z -M x[n-M]
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10 Ex. 6.1 draw Block Diagram Representation of a Second-order Difference Equation x[n] + + b0b0 a1a1 z1z1 z1z1 a2a2 y[n] y[n-1] y[n-2] Solution:
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11 N th -Order Difference Equations Form changed to a[0] normalized to unity
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12 Block Diagram Representation (Direct Form I) v[n] + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N]
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13 + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N] Block Diagram Representation (Direct Form I) v[n]
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14 + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N] Block Diagram Representation (Direct Form I) v[n] Implementing zeros Implementing poles
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15 Block Diagram Representation (Direct Form I) v[n] How many Adders? How many multipliers? How many delays? How many Adders? How many multipliers? How many delays? + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N] N N N+M +M +M+1
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16 + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N] Block Diagram Representation (Direct Form I) v[n]
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17 Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N (or called Canonic direct Form)
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18 Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N
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19 + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N Block Diagram Representation (Direct Form II)
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20 Block Diagram Representation (Direct Form II) + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N Implementing zeros Implementing poles
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21 Block Diagram Representation (Direct Form II) How many Adders? How many multipliers? How many delays? How many Adders? How many multipliers? How many delays? + z1z1 z1z1 + z1z1 + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N N N N+M +M +M+1
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22 Block Diagram Representation (Canonic Direct Form or direct Form II) How many Adders? How many multipliers? How many delays? max(M, N) How many Adders? How many multipliers? How many delays? max(M, N) + + + b0b0 b1b1 bN1bN1 bNbN x[n] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] Assume M = N N N +M +M+1 N
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23 Ex. 6.2 draw Direct Form I and Direct Form II implementation of an LTI system x[n] + z1z1 z1z1 + 1.5 0.9 y[n] w[n-1] w[n-2] + 1 2 w[n] + z1z1 1 2 x[n] x[n-1] + z1z1 z1z1 + 1.5 0.9 y[n] y[n-1] y[n-2] v[n] Solution:
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24 Structures for Discrete-Time Systems 6.2 Signal Flow Graph( 信号流图 ) Representation of Linear Constant- Coefficient Difference Equations
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25 6.2 Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations Associated with each node is a variable or node value, being denoted w j [n]. A Signal Flow Graph is a network of directed branches ( 有向支路 )that connect at nodes( 节点 ). w j [n] w k [n] Node j Node k 梅森 (Mason) 信号流图
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26 Nodes And Branches w j [n] w k [n] a or z -1 Brach ( j, k ) Each branch has an input signal and an output signal. Input w j [n] Output: A linear transformation of input, such as constant gain and unit delay. We will only consider linear Signal Flow Graph An internal node serves as a summer, i.e., its value is the sum of outputs of all branches entering the node. Node j Node k if omitted, it indicates unity
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27 Source Nodes ( 源点 ) Nodes that have no entering branches x j [n]w k [n] Source node j Sink Nodes ( 汇点 ) Nodes that have only entering branches y k [n]w j [n] Sink node k
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28 Example : determine Linear Constant- Coefficient Difference Equations of SFG x[n] y[n]w 1 [n] w 2 [n] a b c d e Source Node Sink Node Solution:
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29 Block Diagram vs. Signal Flow Graph x[n] + a z1z1 + b1b1 b0b0 w[n]y[n] x[n] w 1 [n] w 2 [n] w 3 [n] a b1b1 b0b0 1 2 3 4 w 4 [n] y[n] Delay branch cannot be represented in time domain by a branch gain z1z1 Delay branch Canonic direct Form Source Node Sink Node =w 2 [n-1] by z-transform, a unit delay branch has a gain of z -l. By convention, variables is represented as sequences rather than as z-transforms branching point
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Determine the difference equation (System Function) from the Flow Graph. 30 Block Diagram vs. Signal Flow Graph x[n] + a z1z1 + b1b1 b0b0 w[n] y[n] x[n] w 1 [n] w 2 [n]w 3 [n] a b1b1 b0b0 z1z1 1 2 3 4 w 4 [n] y[n] Solution:
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Block Diagram vs. Signal Flow Graph 31 Determine difference equation difficult in time-domain
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32 Ex. 6.3 Determine the System Function from Flow Graph Solution:
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33 Ex. 6.3 Determine the System Function from Flow Graph for causal system :
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34 Ex. 6.3 compare two implementation -a-a a x[n]x[n] z -1 y[n]y[n] direct form I implementation requires only one multiplication and one delay (memory) element two multiplication and two delay
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35 Structures for Discrete-Time Systems 6.3 Basic Structure for IIR Systems
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36 6.3 Basic Structure for IIR Systems Reduce the number of constant multipliers Increase speed Reduce the number of delays Reduce the memory requirement others: VLSI design;Modularity; multiprocessor implementations; effects of a finite register length and finite-precision arithmetic for a rational system function, many equivalent difference equations or network structures exists. one criteria in the choice among these different structures is computational complexity:
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37 Basic Structures for IIR Systems Direct Forms Cascade Form Parallel Form
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38 6.3.1 Direct Forms v[n] + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N]
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39 Direct Form I v[n] + z1z1 z1z1 + z1z1 + b0b0 b1b1 bM1bM1 bMbM x[n] x[n-1] x[n-2] x[n-M] + z1z1 z1z1 + z1z1 + a1a1 aN1aN1 aNaN y[n] y[n-1] y[n-2] y[n-N] b0b0 b1b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2b2 b N-1 bNbN x[n M+1] a1a1 a2a2 a N-1 aNaN y[n-1] y[n-2] y[n-N] y[n N+1] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v[n] Block Diagram Signal Flow Graph
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40 Direct Form I Signal Flow Graph b0b0 b1b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2b2 b N-1 bNbN x[n M+1] a1a1 a2a2 a N-1 aNaN y[n-1] y[n-2] y[n-N] y[n N+1] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v[n]
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41 Direct Form II x[n] y[n] w[n] b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1
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42 Direct Form II x[n] y[n] w[n] b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1
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43 Ex. 6.4 draw Direct Form I and Direct Form II structures of system x[n]y[n] z1z1 z1z1 z1z1 z1z1 0.75 0.125 2 x[n] y[n] z1z1 z1z1 0.75 0.125 2 Direct Form I Direct Form II Solution:
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44 6.3.2 Cascade Form( 串联形式 ) when all the coefficients are real 1 st -order factors represent real zeros at g k and real poles at c k, and the 2 nd -order factors represent complex conjugate pairs of zeros at h k and h * k and poles at d k, d * k
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45 Cascade Form 2nd Order System 2nd Order System 2nd Order System 2nd Order System 2nd Order System 2nd Order System A modular structure
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46 Cascade Form x[n]y[n] z1z1 z1z1 a 11 a 21 b 11 b 21 b 01 z1z1 z1z1 a 12 a 22 b 12 b 22 b02b02 z1z1 z1z1 a 13 a 23 b 13 b 23 b 03 123 For example, assume N s =3 It is used when implemented with fixed-point arithmetic, the structure can control the size of signals at various critical points because they make it possible to distribute the overall gain of the system.
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47 Ex. 6.5 draw the Cascade structures x[n] y[n] z1z1 z1z1 0.75 0.125 2 Direct Form II 1st-order Direct Form II 1st-order Direct Form I Solution:
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48 Another Cascade Form x[n] y[n] z1z1 z1z1 a 11 a 21 b 11 b 21 z1z1 z1z1 a 12 a 22 b 12 b 22 z1z1 z1z1 a 13 a 23 b 13 b 23 b0b0 ~ ~ ~ ~ ~ ~ implemented with fixed-point arithmetic when floating-point arithmetic is used and dynamic range is not a problem. used to decrease the amount of computation,
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49 6.3.3 Parallel Form
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50 Parallel Form Real Poles Complex Poles Poles at zero Group Real Poles in pairs
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51 Parallel Form z1z1 z1z1 a1ka1k a2ka2k e0ke0k e1ke1k x[n] y[n] C k z -k C0C0
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52 Ex. 6.6 draw parallel-form structures of system 8 x[n]y[n] z1z1 z1z1 0.75 0.125 8 77 Solution 1: If we use 2 nd –order sections,
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53 z1z1 0.5 18 8 x[n]y[n] z1z1 0.25 25 Solution 2: If we use 1 st –order sections, Ex. 6.6 draw parallel-form structures of system
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54 6.3.4 feedback in the IIR systems z1z1 z1z1 a x[n] y[n] -a2-a2 z1z1 a x[n] y[n] a x[n] y[n] systems with feedback may be FIR Noncomputable network z1z1 a x[n] y[n]
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55 Structures for Discrete-Time Systems 6.4 Transposed Forms
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56 There are many procedures for transforming signal flow graphs into different forms while leaving the overall system function between input and output unchanged. 6.4 Transposed Forms Flow Graph Reversal or Transposition x[n] y[n] z1z1 a x[n]y[n] z1z1 a Changes the roles of input and output. Reverse the directions of all arrows. Transposing doesn’t change the input-output relation
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57 Ex. 6.7 determine Transposed Forms for a first-order system z1z1 a x[n]y[n] z1z1 a x[n]y[n] z1z1 a x[n]y[n] Solution:
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58 Both have the same system function or difference equation Ex. 6.8 draw Transposed Forms for a basic second-order section Transpose Solution:
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59 Ex. 6.8 Transposed Forms for a basic second-order section Transpose b0b0 b1b1 x[n] y[n] b2b2 a1a1 a2a2 z1z1 z1z1 v 1 [n] z1z1 z1z1 b0b0 b1b1 x[n] y[n] b2b2 a1a1 a2a2 z1z1 z1z1 v 1 [n] x[n] y[n] b0b0 b1b1 b2b2 z1z1 z1z1 v 2 [n] a1a1 a2a2 z1z1 z1z1
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60 Transposed Direct Form I b0b0 b1b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2b2 b N-1 bNbN x[n M+1] a1a1 a2a2 a N-1 aNaN y[n-1] y[n-2] y[n-N] y[n N+1] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v[n] b0b0 b1b1 x[n] y[n] b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v'[n]
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61 Transposed Direct Form II x[n] y[n] w[n] b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1 y[n] x[n] w ' [n] b0b0 b1b1 b2b2 b N-1 bNbN a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1
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62 Structures for Discrete-Time Systems 6.5 Basic Structure for FIR Systems
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63 6.5 Basic Structure for FIR Systems For causal FIR systems, the system function has only zeros(except for poles at z = 0). 6.5. 1 Direct Form
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64 Direct Form I x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M1]h[M1] h[M]h[M] b0b0 b1b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2b2 b M-1 bMbM x[n M+1] a1a1 a2a2 a N-1 aNaN y[n-1] y[n-2] y[n-N] y[n N+1] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 v[n] y[n] x[n-1] x[n-2] x[n M+1] x[n-M]
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65 Direct Form II x[n] y[n] z1z1 z1z1 z1z1 x[n] y[n] w[n] b0b0 b1b1 b2b2 b M-1 bMbM a1a1 a2a2 a N-1 aNaN z1z1 z1z1 z1z1 y[n] h[0]h[1]h[2] h[M1]h[M1] h[M]h[M]
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66 x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M1]h[M1] h[M]h[M] Traspostion of Direct Form x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M1]h[M1] h[M]h[M] x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M 1] h[M] tapped delay line structure or transversal filter structure. 抽头延迟线结构 or 横向滤波器结构.
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67 6.5.2 Cascade Form x[n] y[n] z1z1 z1z1 b 01 b 11 b 21 z1z1 z1z1 b 02 b 12 b 22 z1z1 z1z1 b 1Ms b 2Ms b 0Ms
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68 Cascade Form x[n] y[n] z1z1 z1z1 b 01 b 11 b 21 z1z1 z1z1 b 02 b 12 b 22 z1z1 z1z1 b 1Ms b 2Ms b 0Ms x[n]y[n] z1z1 z1z1 a 11 a 21 b 11 b 21 b 01 z1z1 z1z1 a 12 a 22 b 12 b 22 b 01 z1z1 z1z1 a 13 a 23 b 13 b 23 b 03
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69 M is evenM is odd h[M-n]= h[n] h[M-n]= h[n] 6.5.3 Structures for Linear Phase Systems A causal FIR system has generalized linear phase if h[n] satisfies: h[M-n]= h[n] for n = 0,1,…,M h[M-n]= h[n] for n = 0,1,…,M or Type I Type III Type II Type VI x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M 1] h[M] M+1 multiplications
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70 For even M and type I or type III systems: 0 M/2 M 0 M Symmetry means we can half the number of multiplications
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71 Type I and III x[n-1] x[n-2]x[n-M/2+1] x[n-M/2] x[n-M] x[n] x[n-M+1] x[n-M+2]x[n-M/2-1] x[n] y[n] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 h[M/2] h[M/2 1] h[0]h[1]h[2] 0 M/2 M 0 M Type III =0 -- - - Type I x[n] y[n] z1z1 z1z1 z1z1 h[0] h[1]h[2] h[M 1] h[M] x[n-1]x[n-2] x[n-M] x[n] x[n-M+1]
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72 Type II or Type IV FIR Systems For odd M and type II or type IV systems: 0 M/2M 0 M
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73 Type II and IV Structure for odd M x[n-(M-1)/2] x[n-(M+1)/2] x[n-1] x[n-2] x[n-M] x[n-M+1] x[n-M+2] x[n] 0 M/2M 0 M - -- - Type II Type IV x[n] y[n] z1z1 z1z1 z1z1 h[0]h[1]h[2] h[M 1] h[M]
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74 Type I, and II x[n-1] x[n-2]x[n-M/2+1] x[n-M/2] x [ n-M] x[n] x [ n-M+1] x[n-M+2]x[n-M/2-1] x[n] y[n] z1z1 z1z1 z1z1 z1z1 z1z1 z1z1 h[M/2] h[M/2 1] h[0]h[1]h[2] x[n-(M-1)/2] x[n-(M+1)/2] x[n-1] x[n-2] x[n-M] x[n-M+1] x[n-M+2] x[n] Type I Type II
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75 6.6 OVERVIEW OF FINITE-PRECISION NUMERICAL EFFECTS 6.6.1 Number Representations A real number can be represented with infinite precision in two's-complement form as where X m is an arbitrary scale factor and the b i s are either 0 or 1. The quantity b 0 is referred to as the sign bit. If b 0 = 0, then 0 ≤ x < X m, and if b 0 = 1, then -X m ≤ x < 0.
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76 For a finite number of bits (B +1), the equation above must be modified to so the smallest difference between numbers is 6.6.1 Number Representations the quantized numbers are in the range : -X m ≤ < X m.
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77 quantizing a number to (B +1) bits can be implemented by rounding or by truncation, which is a nonlinear memoryless operation. define the quantization error as 6.6.1 Number Representations The fractional part of can be represented with the positional notation
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78 For the case of two's-complement rounding, - Δ/2 < e <Δ/2, and for two's-complement truncation, - Δ< e <0 6.6.1 Number Representations truncation rounding For B =2
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79 6.6.2Quantization in Implementing Systems Consider the following system A more realistic model would be
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80 6.6.2 Quantization in Implementing Systems In order to analyze it we would prefer
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81 6.7.1 Effects of Coefficient Quantization in IIR Systems When the parameters of a rational system are quantized, The poles and zeros of the system function move. If the system structure of the system is sensitive to perturbation of coefficients, The resulting system may no longer meet the original specifications, and may no longer be stable.
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82 6.7 Effects of Coefficient Quantization in IIR Systems Detailed sensitivity analysis for general case is complicated. Using simulation tools, in specific cases, Quantize the coefficients and analyze frequency response Compare frequency response to original response We would like to have a general sense of the effect of quantization
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6.7.1 Effects of Coefficient Quantization in IIR Systems 83 Each root is affected by quantization errors in ALL coefficient Tightly clustered roots are significantly effected Narrow-bandwidth lowpass or bandpass filters can be very sensitive to quantization noise Quantization
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84 Effects on Roots(poles and zeros) The larger the number of roots in a cluster the more sensitive it becomes So second order cascade structures are less sensitive to quantization error than higher order system Each second order system is independent from each other Quantization
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6.7.2 Example of Coefficient Quantization in an Elliptic Filter 85 An IIR bandpass elliptic filter was designed to meet the following specifications:
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6.7.2 Example of Coefficient Quantization in an bandpass Elliptic Filter 86 Poles and zeros of H(z) for unquantized Coefficients and 16-bit quantization of the direct form unquantized 16-bit quantization the direct form system cannot be implemented with 16-bit coefficients because it would be unstable
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6.7.2 Example of Coefficient Quantization in an bandpass Elliptic Filter 87 16-bit quantizatio n the cascade form is much less sensitive to coefficient quantization Magnitude in passband for 16-bit quantization of the cascade form
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6.7.2 Example of Coefficient Quantization in an Elliptic Filter 88
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89 6.7.3 Poles of Quantized 2nd-Order Sections Consider a 2nd order system with complex-conjugate pole pair
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90 6.7.3 Poles of Quantized 2nd-Order Sections 3-bits The pole locations after quantization will be on the grid point
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91 6.7.3 Poles of Quantized 2nd-Order Sections 7-bits The pole locations after quantization will be on the grid point
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92 Coupled-Form Implementation of Complex-Conjugate Pair Equivalent implementation of the 2nd order system Twice as many constant multipliers are required to achieve more uniform density.
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93 Coupled-Form Implementation of Complex-Conjugate Pair 3-bits 7-bits Twice as many constant multipliers are required to achieve this more uniform density of quantization grid
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94 6.7.4 Effects of Coefficient Quantization in FIR Systems No poles to worry about only zeros Direct form is commonly used for FIR systems Suppose the coefficients are quantized
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95 6.7.4 Effects of Coefficient Quantization in FIR Systems No poles to worry about only zeros Direct form is commonly used for FIR systems
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96 6.7.4 Effects of Coefficient Quantization in FIR Systems Quantized system is linearly related to the quantization error Again quantization noise is higher for clustered zeros However, most FIR filters have spread zeros
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97 6.8 EFFECTS OF ROUND-OFF NOISE IN DIGITAL FILTERS Difference equations implemented with finite-precision arithmetic are non-linear systems. Second order direct form I system
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98 6.8 EFFECTS OF ROUND-OFF NOISE IN DIGITAL FILTERS Model with quantization effect Density function error terms for rounding
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99 6.8.1 Analysis of the Direct Form IIR Structures Combine all error terms to single location to get
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100 6.8.1 Analysis of the Direct Form IIR Structures The variance of e[n] in the general case is The contribution of e[n] to the output is
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101 6.8.1 Analysis of the Direct Form IIR Structures The variance of the output error term f[n] is
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102 Example 6.9 Round-Off Noise in a First- Order System Suppose we want to implement the following stable system The quantization error noise variance is
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103 Example 6.9 Round-Off Noise in a First- Order System Noise variance increases as |a| gets closer to the unit circle As |a| gets closer to 1 we have to use more bits to compensate for the increasing error
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104 6.9 Zero-Input Limit Cycles in Fixed- Point Realization of IIR Filters For stable IIR systems the output will decay to zero when the input becomes zero A finite-precision implementation, however, may continue to oscillate indefinitely Nonlinear behaviour is very difficult to analyze, so we will study by example
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105 6.9 Zero-Input Limit Cycles in Fixed- Point Realization of IIR Filters Example: Limite Cycle Behavior in First-Order Systems Assume x[n] and y[n-1] are implemented by 4 bit registers
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106 Example Cont’d Assume that a=1/2=0.100b and the input is ny[n]Q(y[n]) 07/8=0.111b 17/16=0.011100b1/2=0.100b 21/4=0.010000b1/4=0.010b 31/8=0.001000b1/8=0.001b 41/16=0.00010b1/8=0.001b If we calculate the output for values of n A finite input caused an oscillation with period 1
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107 Example: Limite Cycles due to Overflow Consider a second-order system realized by Where Q() represents two’s complement rounding Word length is chosen to be 4 bits Assume a 1 =3/4=0.110b and a 2 =-3/4=1.010b Also assume The output at sample n=0 is
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108 Example: Limite Cycles due to Overflow Binary carry overflows into the sign bit changing the sign When repeated for n=1 The output at sample n=0 is After rounding up we get
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109 Avoiding Limit-Cycles Desirable to get zero output for zero input: Avoid limit-cycles Generally adding more bits would avoid overflow Using double-length accumulators at addition points would decrease likelihood of limit cycles
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110 Avoiding Limit-Cycles Trade-off between limit-cycle avoidance and complexity FIR systems cannot support zero- input limit cycles
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111 2015-10-15 111 Zhongguo Liu_Biomedical Engineering_Shandong Univ. Chapter 6 HW 6.5, 6.6, 6.19 6.1, 6.3, 6.20 上一页下一页 返 回
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