1. ECE 340 ELECTRONICS I BJT APPLICATIONS AND BIASING

2. SHORTHAND CIRCUIT DIAGRAM VSVS R1R1 R2R2 R1R1 R2R2 VXVX VXVX VSVS

3. BJT REGIONS OF OPERATION CUTOFF ACTIVE OR LINEAR SATURATION

4. NPN BJT BIAS CIRCUIT ANALYSIS + V BE - - V CB + + V C E - IBIB ICIC IEIE

5. NPN INPUT CIRCUIT ANALYSIS

6. NPN OUTPUT CIRCUIT ANALYSIS

7. NPN DC VOLTAGES

8. NPN REGIONS OF OPERATION

9. NPN OPERATING LIMITS

11. PNP BIAS CIRCUIT ANALYSIS IBIB IEIE ICIC

12. PNP INPUT CIRCUIT ANALYSIS

13. PNP OUTPUT CIRCUIT ANALYSIS

14. PNP DC VOLTAGES

15. PNP REGIONS OF OPERATION

16. PNP OPERATING LIMITS

18. SINGLE RESISTOR BIASING CIRCUIT Q1Q1 RBRB RCRC V CC ICIC IBIB

19. SINGLE RESISTOR BIASING SETS BASE CURRENT DIRECTLY CONTROLLED BY SUPPLY VOLTAGE

20. INPUT KVL EQUATION

21. INPUT LOAD LINE EQUATION

22. COLLECTOR CURRENT DEPENDENCE ON V BE

23. OUTPUT KVL EQUATION

24. OUTPUT LOAD LINE EQUATION

25. RESISTOR DIVIDER BIASING CIRCUIT Q1Q1 R1R1 RCRC V CC R2R2 ICIC

26. VOLTAGE DIVIDER BIASING PROVIDES TWO METHODS OF DETERMINING BIAS CONDITIONS SETS V BE VOLTAGE SUPPRESSES DEPENDENCE ON β

27. DIRECT METHOD FIND THEVENIN CIRCUIT AT BASE NODE CREATES INPUT CIRCUIT

28. RESIDUAL CIRCUIT FROM THEVENIN CONVERSION Q1Q1 RCRC V CC V BB RBRB IBIB ICIC

29. INPUT EQUATION

30. INPUT LOAD LINE EQUATION

31. COLLECTOR CURRENT DEPENDANCE

32. OUTPUT EQUATION

33. OUTPUT EQUATION LOAD LINE

34. INDIRECT OR APPROXIMATE METHOD ASSUME I B ≈ 0 V BE IS SET BY VOLTAGE DIVIDER

35. INPUT EQUATION

36. ITERATIVE METHOD FOR CONVERGENCE

37. SUBSTITUTE V BE2 FOR V BE1 CONTINUE ITERATION UNTIL V BEN+1 ≈ V BEN

38. VOLTAGE DIVIDER WITH EMITTER DEGENERATION Q1Q1 RCRC V CC RERE R1R1 R2R2

39. RESULTANT CIRCUIT FROM THEVENIN CONVERSION Q1Q1 RCRC V CC RERE RBRB V BB

40. INPUT EQUATION

41. COLLECTOR CURRENT DEPENDENCE

42. ITERATIVE METHOD

43. ITERATIVE METHOD FOR CONVERGENCE SUBSTITUTE V BE2 FOR V BE1 CONTINUE ITERATION UNTIL V BEN+1 ≈ V BEN

44. SELF-BIASED CIRCUIT Q1Q1 RCRC V CC RBRB IBIB

45. INPUT EQUATION