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ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed.

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Presentation on theme: "ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed."— Presentation transcript:

1 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed Electrical & Mechanical Engineer BMayer@ChabotCollege.edu Engineering 43 Super Node/Mesh Thevénin/Norton

2 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 2 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis OutLine  ReIterate NODE & LOOP/MESH Analysis by way of Examples  SuperNode Method  SuperMesh Technique  Loops vs Meshes; describe difference  Loop & Node Compared  Introduction to Thevenin & Norton theorems

3 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 3 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis OutLine  Thevénin theorem: R TH =R N & V TH =V OC  Norton theorem: R N =R TH & I N =I SC  Source Transformation  Thevenin & Norton theorems for INdependent Source Circuits by DeActivation Dependent Source Circuits by V OC /I SC

4 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 4 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Node Analysis (find V by kCl) 1.Define a GND Node 2.Label all Non-GND nodes not connected to a Source; i.e., the UNknown Nodes 3.Write the CURRENT Law Eqns at the Unknown Nodes using Ohm’s Law; I = ΔV/R 4.Clear Fractions by Multiplying by the LCD Be sure to Include UNITS 5.Work the Linear Algebra to find Unknown Node Voltages Example (On Board)

5 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 5 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

6 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 6 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

7 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 7 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

8 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 8 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop Analysis (find I by kVl) 1.Define a GND Node 2.Draw Current Loops or Meshes to NOT be Redandant Pass Thru ALL Circuit Elements 3.Write the VOLTAGE Law Eqns For each Loop/Mesh usingNodes using Ohm’s Law; ΔV=RI 4.Divide by Eqns by the LCM of the I’s Be sure to Include UNITS 5.Work the Linear Algebra to find Unknown Loop/Mesh Currents Example (On Board)

9 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 9 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

10 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 10 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

11 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 11 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis ReCall Node (KCL) Analysis  Need Only ONE KCL Eqn  The Remaining Eqns From the Indep Srcs  Solving The Eqns  3 Nodes Plus the Reference. In Principle Need 3 Equations... But two nodes are connected to GND through voltage sources. Hence those node voltages are KNOWN

12 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 12 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis SuperNode Technique  Consider This Example  Conventional Node Analysis Requires All Currents at a Node  2 eqns, 3 unknowns... Not Good (I S unknown) Recall: The Current thru the V src is NOT related to the Potential Across it  But Have Ckt V-Src Reln  More Efficient solution: Enclose The Source, and All Elements In parallel, Inside a Surface. –Call That a SuperNode SUPERNODE

13 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 13 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Supernode cont.  Apply KCL to the Surface  Now Have 2 Equations in 2 Unknowns  Then The Ckt Solution Using LCD Technique See Next Slide SUPERNODE The Source Current Is interior to the Surface and is NOT Required  Still Need 1 More Equation – Look INSIDE the Surface to Relate V 1 & V 2

14 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 14 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Now Apply Gaussian Elim  The Equations  Mult Eqn-1 by LCD (12 kΩ)  Add Eqns to Elim V 2  Use The V-Source Rln Eqn to Find V 2 SUPERNODE

15 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 15 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Find the node voltages And the power supplied By the voltage source To compute the power supplied by the voltage source We must know the current through it: @ node-1 BASED ON PASSIVE SIGN CONVENTION THE POWER IS ABSORBED BY THE SOURCE!!

16 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 16 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Illustration using Conductances  Write the Node Equations KCL At v 1  At The SuperNode Have V-Constraint v 2 − v 3 = v A  KCL Leaving Supernode  Now Have 3 Eqns in 3 Unknowns Solve Using Normal Techniques   

17 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 17 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Find I o  Known Node Voltages  Now use KCL at SuperNode to Find V 3  The SuperNode V-Constraint  Mult by 2 kΩ LCD, collect Terms to Find: SUPERNODE

18 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 18 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example  Find I o Using Nodal Analysis  Known Voltages for Sources Connected to GND  Now KCL at SuperNode  The Constraint Eqn SUPERNODE  Now Notice That V 2 is NOT Needed to Find I o 2 Eqns in 2 Unknowns  By Ohm’s Law

19 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 19 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dependent Sources  Circuits With Dependent Sources Present No Significant Additional Complexity  The Dependent Sources Are Treated As Regular Sources  As With Dependent CURRENT Sources Must Add One Equation For Each Controlling Variable

20 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 20 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example – Dep I src  Find I o by Nodal Analysis  Notice V-Source Connected to the Reference Node  KCL At Node-2  Sub I x into KCL Eqn  Mult By 6 kΩ LCD  Then I o  Controlling Variable In Terms of Node Potential

21 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 21 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Current Controlled V-Source  Find I o  Supernode Constraint  Controlling Variable in Terms of Node Voltage  KCL at SuperNode  Multiply by LCD of 2 kΩ  Recall  Then  So Finally

22 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 22 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis ReCall MESH Analysis  Use Mesh Analysis  So V o  Sub for I 1 to Find I 2

23 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 23 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis SuperMeshes 1.Create Mesh Currents 2.Write Constraint Equation Due To Mesh Currents SHARING Current Sources SUPERMESH 3.Write Equations For Remaining Meshes 4.Define A SuperMesh By AVOIDNG The Shared Current with a Carefully Chosen Loop

24 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 24 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis SuperMeshes cont. 5.Write KVL For The SuperMesh as we do NOT know the Voltage Across the 4 mA Current-Source  We Now have 3 Eqns in 3 Unknowns and the Math Model is Complete Solve for I 1, I 2, I 3 using standard techniques SUPERMESH KVL

25 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 25 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis SuperNODE vs SuperMESH  Use superNODE to AVOID a V-source current, I Vs, in KCL Eqns  Use superMESH to AVOID an I-source, ΔV Is, in KVL Eqns

26 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 26 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Shared I src – General Loop Approach  Strategy Define Loop Currents That Do NOT Share Current Sources –Even If It Means ABANDONING Meshes  For Convenience, Begin by Using Mesh Currents Until Reaching Shared CURRENT Source as V-across an I-source is NOT Known At That Point Define a NEW Loop  To Guarantee That The New Loop Gives An Independent Equation, Must Ensure That It Includes Components That Are NOT Part Of Previously Defined Loops

27 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 27 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis General Loop Approach cont.  A Possible Approach Create a Loop by Avoiding The Current Source  The Eqns for Current Source Loops  The Eqns for 3rd Loop (3 Eqns & 3 Unknowns)  The Loop Currents Obtained With This Method Are Different From Those Obtained With A SuperMesh A SuperMesh used Previously Defined Mesh Currents

28 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 28 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Find V Across R’s  For Loop Analysis Note Three Independent Current Sources Four Meshes One Current Source Shared By Two Meshes  Mesh Equations For Loops With I-Sources  Careful Choice Of Loop Currents Should Make Only One Loop Equation Necessary Three Loop Currents Can Be Chosen Using Meshes And Not Sharing Any Source

29 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 29 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Find V Across R’s cont.  KVL for I 4 Loop  Solve For The Current I 4 Using The I Sj Now Use Ohm’s Law To Calc Required Voltages  Note that Loop-4 does NOT pass thru ANY CURRENT-Sources This AVOIDS the UNknown potentials across the I-sources

30 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 30 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dependent Sources  General Approach Treat The Dep. Source As Though It Were Independent Add One Equation For The Controlling Variable  Example at Rt.: Mesh Currents Defined by Sources  Mesh-3 by KVL  Mesh-4 by KVL

31 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 31 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dependent Sources cont.  The Controlling Variable Eqns  In Matrix Form  Solve by Elimination or Linear-Algebra  Combine Eqns, Then Divide by 1kΩ

32 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 32 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared  Consider the Ckt  Find Vo by NODE Analysis ID Nodes Make a SuperNode  Vsrc to GND  SuperNode Constraint

33 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 33 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared (2)  KCL at SuperNode  The SuperNode Eqn  Mult. By 1kΩ LCD  The Node 3 KCL  Mult. By 1kΩ LCD

34 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 34 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared (3)  The Controlling Var.  In SuperNode Eqn  Thus 3 Eqns in Unknowns V 1, V 2, V 3  Recall the GOAL

35 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 35 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared (4)  Now by Loops  Start with 3 Meshes  The Mesh/Loop Eqns Loop-1: Loop-3:  Add a General Loop to avoid the Isrc Loop-2: –Note I 3 = –2 mA Loop-4: –Note I 1 = 2 mA

36 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 36 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared (5)  The Controling Var  As Before V x = V 2  And V 2 is related to the net current From Node-2 to GND  By Net Current & Ohm’s Law  SubOut V x in Loop-2 & Loop-4 Eqns:  After Subbing Find:

37 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 37 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Loop & Node Compared (6)  Summarize Loops  Using The Loop/Mesh Eqns Find  Recall the GOAL  General Comments Nodes (KCL) are generally easier if we have VOLTAGE Sources Loops (kVL) are generally easier if we have CURRENT Sources

38 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 38 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin’s & Norton’sTheorems  These Are Some Of The Most Powerful Circuit analysis Methods  They Permit “Hiding” Information That Is Not Relevant And Allow Concentration On What Is Important To The Analysis

39 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 39 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Low Distortion Power Amp From PreAmp (voltage ) To speakers  to Match Speakers And Amplifier One Should Analyze The Amp Ckt

40 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 40 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Low Dist Pwr Amp cont  To Even STAND A CHANCE to Match the Speakers & Amp We Need to Simplify the Ckt Consider a Reduced CIRCUIT EQUIVALENT  Replace the OpAmp+BJT Amplifier Ckt with a MUCH Simpler (Linear) Equivalent The Equivalent Ckt in RED “Looks” The Same to the Speakers As Does the Complicated Circuit

41 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 41 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin’s Equivalence Theorem  Thevenin Equivalent Circuit for PART A  v TH = Thevenin Equivalent VOLTAGE Source  R TH = Thevenin Equivalent Series (Source) RESISTANCE

42 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 42 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Norton’s Equivalence Theorem  Norton Equivalent Circuit for PART A  i N = Norton Equivalent CURRENT Source  R N = Norton Equivalent Parallel (Source) RESISTANCE

43 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 43 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Examine Thevenin Approach  For ANY Part-B Circuit  The Thevenin Equiv Ckt for PART-A → V-Src is Called the THEVENIN EQUIVALENT SOURCE R is called the THEVENIN EQUIVALENT RESISTANCE PART A MUST BEHAVE LIKE THIS CIRCUIT

44 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 44 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Examine Norton Approach  In The Norton Case  The Norton Equiv Ckt for PART-A → Norton The I-Src is Called The NORTON EQUIVALENT SOURCE

45 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 45 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Interpret Thevenin & Norton  This equivalence can be viewed as a source transformation problem. It shows how to convert a voltage source in series with a resistor into an equivalent current source in parallel with the resistor SOURCE TRANSFORMATION CAN BE A GOOD TOOL TO REDUCE THE COMPLEXITY OF A CIRCUIT Thevenin Norton  In BOTH Cases

46 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 46 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Source Transformations  Source transformation is a good tool to reduce complexity in a circuit...WHEN IT CAN APPLIED “IDEAL sources” are NOT good models for the REAL behavior of sources –.e.g., A Battery does NOT Supply huge current When Its Terminals are connected across a tiny Resistance as Would an “Ideal” Source  These Models are Equivalent When  Source X-forms can be used to determine the Thevenin or Norton Equivalent But There May be More Efficient Methods

47 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 47 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Solve by Src Xform  In between the terminals we connect a current source and a resistance in parallel  The equivalent current source will have the value 12V/3kΩ  The 3k and the 6k resistors now are in parallel and can be combined  In between the terminals we connect a voltage source in series with the resistor  The equivalent V-source has value 4mA*2kΩ  The new 2k and the 2k resistor become connected in series and can be combined

48 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 48 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Solve by Src Xform cont.  After the transformation the sources can be combined  The equivalent current source has value 8V/4kΩ = 2mA 1.Do another source transformation and get a single loop circuit 2.Use current divider to compute I O and then Calc V O using Ohm’s law  The Options at This Point

49 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 49 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Or one more source transformation PROBLEM Find V O using source transformation Norton 3 current sources in parallel and three resistors in parallel EQUIVALENT CIRCUITS

50 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 50 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Source Xform Summary  These Models are Equivalent  Source X-forms can be used to determine the Thevenin or Norton Equivalent  Next Review Several Additional Approaches To Determine Thevenin Or Norton Equivalent Circuits

51 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 51 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Determine the Thevenin Equiv.  v TH = OPEN CIRCUIT Voltage at A-B if Part-B is Removed and Left UNconnected  i SC = SHORT CIRCUIT Current at A-B if Voltage at A-B is Removed and Replaced with a Wire (a short)  Then by R = V/I

52 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 52 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Graphically... 1. Determine the Thevenin equivalent source Remove part B and compute the OPEN CIRCUIT voltage 2. Determine the SHORT CIRCUIT current Remove part B and compute the SHORT CIRCUIT current Second circuit problemOne circuit problem  Then

53 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 53 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin w/ Indep. Sources  The Thevenin Equivalent V-Source is computed as the open loop voltage  The Thevenin Equivalent Resistance CAN BE COMPUTED by setting to zero all the INDEPENDENT sources and then determining the resistance seen from the terminals where the equivalent will be placed

54 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 54 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin w/ Indep. Sources cont “Part B”  Since the evaluation of the Thevenin equivalent Resistance for INdependent-Source-Only circuits can be very simple, we can add it to our toolkit for the solution of circuits “Part B”

55 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 55 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example  Find V o Using Thevenin’s Theorem  Identify Part-B (the Load)  Break The Circuit At the Part-B Terminals “PART B”  DEactivate 12V Source to Find Thevenin Resistance Produces a SHORT

56 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 56 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example cont.  Note That R TH Could be Found using I SC  By Series-Parallel R’s  Then by I-Divider  Then I tot  Finally R TH Same As Before

57 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 57 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example cont.2  Finally the Thevenin Equivalent Circuit  And V o By V-Divider

58 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 58 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Let’s do MQ-02e on Board  Find: V t & R t

59 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 59 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example  Use Thevenin To Find Vo  Have a CHOICE on How to Partition the Ckt Make “Part-B” As Simple as Possible  Deactivate the 6V and 2mA Source for R TH “Part B”

60 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 60 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example cont  For the open circuit voltage we analyze the circuit at Right (“Part A”)  Use Loop/Mesh Analysis  Then V OC  Finally The Equivalent Circuit

61 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 61 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis CALCULATE Vo USING NORTON PART B COMPUTE Vo USING THEVENIN PART B

62 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 62 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis DEpendent & INdependent Srcs  Find The Open Circuit Voltage And Short Circuit Current  Solve Two Circuits (V oc & I sc ) For Each Thevenin Equivalent  Any and all the techniques may be used; e.g., KCL, KVL, combination series/parallel, node & loop analysis, source superposition, source transformation, homogeneity  Setting To Zero All Sources And Then Combining Resistances To Determine The Thevenin Resistance is, in General, NOT Applicable!!

63 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 63 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Recognize Mixed sources Must Compute Open Circuit Voltage, V OC, and Short Circuit Current, I SC  The Open Ckt Voltage  Use V-Divider to Find V X  For V b Use KVL  Solve for V TH  The Short Ckt Current Note that Shorting a-to-b Results in a Single Large Node  Now V TH = V x − V b

64 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 64 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example cont  Need to Find V x  KCL at Single Node  Then R TH Single node  Solving For V x  KCL at Node-b for I SC  The Equivalent Circuit V a = V b = V X

65 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 65 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Illustration  Use Thevenin to Determine V o  Partition Guidelines “Part-B” Should be as Simple As Possible After “Part A” is replaced by the Thevenin equivalent should result in a very simple circuit The DEpendent srcs and their controlling variables MUST remain together  Use SuperNode to Find Open Ckt Voltage “Part B”  Constraint at SuperNode  KCL at SuperNode

66 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 66 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Illustration cont  The Controlling Variable  Solving 3 Eqns for 3 Unknowns Yields  Now Tackle Short Circuit Current  At Node-A find  V A =0 → The Dependent Source is a SHORT Yields Reduced Ckt

67 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 67 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Illustration cont  Using the Reduced Ckt  Now Find R TH  Setting All Sources To Zero And Combining Resistances Will Yield An INCORRECT Value  Finally the Solution  Note: Some ckts can produce NEGATIVE R TH

68 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 68 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example  Find V o using Thevenin  Define Part-A  Find V OC using SuperNode Super node KVL  Apply KVL  With The Controlling Variable Find

69 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 69 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example cont  Next The Short Circuit Current  The ONLY Value That Satisfies the Above eqns  KCL at Top Node Recall Dep Src is a SHORT MINUS MINUS 3V  Using V OC & I SC  The Equiv. Ckt

70 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 70 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Note on Example  The Equivalent Resistance CanNOT Be Obtained By DeActivating The Sources And Determining The Resistance Of The Resulting InterConnection Of Resistors Suggest Trying it → R th,wrong = 2.5 kΩ –R th,actual = 0.75 kΩ R eq

71 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 71 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis EXAMPLE: Find V o By Thevenin  Select Partition  Use Meshes to Find V OC “Part B” KVL for V_oc  In The Mesh Eqns  The Controlling Variable  By Dep. Src Constraint  Solve for V OC  Now KVL on Entrance Loop

72 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 72 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Find V o By Thevenin cont  Now Find I SC  The Mesh Equations  The Controlling Variable  Solving for I 1 Find Again  Find I SC by Mesh KVL  Then Thevenin Resistance  Use Thevenin To Find Vo

73 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 73 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Illustration  The Merthod for Mixed Sources  For the Short Ckt Current  The Open Ckt Voltage

74 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 74 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis WhiteBoard Work LLet’s Work This Problem Find Vo by Source Transformation

75 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 75 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis All Done for Today More on Source Xforms

76 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 76 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example  Find Vo Using Thevenin’s Theorem  in the region shown, could use source transformation twice and reduce that part to a single source with a resistor.  Alternative: apply Thevenin Equivalence to that part (viewed as “Part A”)  Deactivating (Shorting) The 12V Source Yields  Opening the Loop at the Points Shown Yields

77 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 77 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example cont.  Then the Original Circuit Becomes After “Theveninizing”  Apply Thevenin Again  For Open Circuit Voltage Use KVL  Result is V-Divider for Vo  Deactivating The 8V & 2mA Sources Gives

78 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 78 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Example  Alternative  Can Apply Thevenin only once to get a voltage divider For the Thevenin Resistance Deactivate Sources  For the Thevenin voltage Need to analyze this circuit  Find V OC by SuperPosition “Part B”

79 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 79 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Thevenin Alternative cont.  Open 2mA Source To find Vsrc Contribution to V OC  Short 12V Source To find Isrc Contribution to V OC  Thevenin Equivalent of “Part A”  A Simple Voltage-Divider as Before

80 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 80 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example R1 = 1k; R2 = 2k, R3 = 1k, R4 = 2k Is1 =2mA, Is2 = 4mA, Is3 = 4mA, Vs1 = 12 V  Need Only V 1 and V 2 to Find V o  Known Node Potential  Now KCL at Node 1  Find V o  To Start Identify & Label All Nodes Write Node Equations Examine Ckt to Determine Best Solution Strategy  Notice

81 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 81 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example cont. R1 = 1k; R2 = 2k, R3 = 1k, R4 = 2k Is1 =2mA, Is2 = 4mA, Is3 = 4mA, Vs = 12 V  At Node 4  To Solve the System of Equations Use LCD-multiplication and Gaussian Elimination  At Node 2

82 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 82 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example cont.  The LCDs *2kΩ (1) (2) (3)  Now Add Eqns (2) & (3) To Eliminate V 4 (4)  Now Add Eqns (4) & (1) To Eliminate V 2  BackSub into (4) To Find V 2  Find V o by Difference Eqn

83 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 83 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Complex SuperNode  Write the Node Eqns  Set UP Identify all nodes Select a reference Label All nodes  Nodes Connected To Reference Through A Voltage Source  Eqn Bookkeeping: KCL@ V 3 KCL@ SuperNode 2 Constraint Equations One Known Node supernode  Voltage Sources In Between Nodes And Possible Supernodes Choose to Connect V 2 & V 4

84 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 84 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Complex SuperNode cont.  Now KCL at Node-3 supernode  Constraints Due to Voltage Sources  Now KCL at Supernode Take Care Not to Omit Any Currents V s1 V s2 V s3  5 Equations 5 Unknowns → Have to Sweat Details

85 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 85 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dep V-Source Example  Find I o by Nodal Analysis  Notice V-Source Connected to the Reference Node  SuperNode Constraint  KCL at SuperNode  Mult By 12 kΩ LCD  Controlling Variable in Terms of Node Voltage

86 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 86 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dep V-Source Example cont  Simplify the LCD Eqn  By Ohm’s Law

87 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 87 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example  Select Soln Method Loop Analysis –3 meshes –One current source Nodal Analysis –3 non-reference nodes –One super node Both Approaches Seem Comparable → Select LOOP Analysis –Specifically Choose MESHES  Select Mesh Currents  Write Loop Eqns for Meshes 1, 2, 3 by KVL

88 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 88 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example cont  We Seek V o, Thus Using Ohm’s Law Need only Find I 3  Simplify: Divide Loop Eqns by 1kΩ I Coeffs Become NUMBERS Voltages Converted to mA  Note That I 1 = I S and Sub into Loop Eqns  Substitute into The Remaining Loop Eqns See Next Slide

89 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 89 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example cont.2  The Loop-2 and Loop-3 Eqns  Then by Ohm’s Law

90 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 90 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Find V o - Compare Mesh vs. Loop  Using MESH Currents  Using LOOP Currents Treat The Dependent Source As One More Voltage Source  Mesh-1 & Mesh-2  Loop-1 & Loop-2

91 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 91 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Compare Loop vs. Mesh cont. Compare Loop vs. Mesh cont.  Using MESH Currents  Using LOOP Currents  Now Express The Controlling Variable In Terms Of MESH or LOOP Currents Solving

92 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 92 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Compare Loop vs. Node cont. Compare Loop vs. Node cont.  Using MESH Currents  Using LOOP Currents Solutions Finally  Notice The Difference Between MESH Current I 1 and LOOP Current I 1 even Though They Are Associated With The Same Path  The Selection Of LOOP Currents Simplifies Expression for V x and Computation of V o

93 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 93 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dep I src Not Shared by Mesh  Treat The Dependent Source As A Conventional Source  Equations For Meshes With Current Sources  Express The Controlling Variable, V x, In Terms Of Loop Currents  Then KVL on The Remaining Loop (I 3 )

94 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 94 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Dep I src Not Shared by Mesh  Asked to Find Only V o Need Only Determine I 3  The Dep Src Eqns  From KVL Eqn for I 3  Thus

95 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 95 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Find V o Using Mesh Analysis  Draw the Mesh Currents  Controlling Variable In Terms Of Loop Currents  Write KVL Mesh Eqns For Mesh-1 & Mesh-2

96 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 96 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Find V o Using Mesh Analysis cont  Substitute & Collect Terms  Solve for I 2  Finally V o

97 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 97 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis WhiteBoard Work LLet’s Work This Problem FFind the OutPut Voltage, V O IXIX

98 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 98 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

99 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 99 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Outline of Theorem Proof  Consider Linear Circuit → Replace v o with a SOURCE  If Circuit-A is Unchanged Then The Current Should Be The Same FOR ANY Vo (Source or Rat’sNest Generated)  Use Source SuperPosition 1 st : Inside Ckt-A OPEN all I-Src’s, SHORT All V-Srcs –Results in i o Due to v o 2 nd : Short the External V-Src, v o –Results in i SC Due to Sources Inside Ckt-A

100 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 100 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Theorem Proof Outline cont.  Graphically the Superposition  Then The Total Current All independent sources set to zero in A  Now DEFINE using V/I for Ckt-A  Then By Ohm’s Law

101 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 101 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Theorem Proof Outline cont.2  Consider Special Case Where Ckt-B is an OPEN (i =0)  The Open Ckt Eqn Suggests  Also recall  How Do To Interpret These Results? v OC is the EQUIVALENT of a single Voltage Source R TH is the EQUIVALENT of a Single Resistance which generates a Voltage DROP due to the Load Current, i Think y = mx + b

102 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 102 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Theorem Proof –Version 2 1.Because of the LINEARITY of the models, for any Part B the relationship between v O and the current, i, has to be of the form 2.Result must hold for “every valid Part B” 3.If part B is an open circuit then i=0 and... 4.If Part B is a short circuit then v O is zero. In this case (Linear Response)

103 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 103 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example  Find Thevenin Equiv.  Find V TH by Nodal Analysis:  I out = 0  Part B is irrelevant. The voltage V ab will be the value of the Thevenin equivalent source.  For Short Circuit Current Use Superposition  When I S is Open the Current Thru the Short  When V S is Shorted the Current Thru the Short

104 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 104 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example – Find Thevenin cont  Find Thevenin Resistance  Find the Total Short Ckt Current  To Find R TH Recall  Then R TH  In this case the Thevenin resistance can be computed as the resistance from a-b when all independent sources have been set to zero Is this a GENERAL Result?

105 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 105 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example  Find Vo Using Thevenin’s Theorem  First, Identify Part-B  Deactivate (i.e., Short Ckt) 6V & 12V Sources to Find R TH “PART B”

106 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 106 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Numerical Example cont.  Use Loop Analysis to Find the Open Circuit Voltage  The Resulting Equivalent Circuit  Finally the Output

107 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 107 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis KVL Example Xform  Deactivate Srcs for R TH  Use Loops for V TH

108 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 108 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Example cont.  OR, Use Superposition to Find Thevenin Voltage  First Open The Current Source  Next Short-Circuit the Voltage Source Using I-Divider  Find Isrc Contribution by KVL KVL  Add to Find Total V TH

109 BMayer@ChabotCollege.edu ENGR-43_Lec-02b_SuperNM_Thevenin-Norton.pptx 109 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis WhiteBoard Work LLet’s Work This Problem Find Vo by Source Transformation


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