Presentation is loading. Please wait.

Presentation is loading. Please wait.

Testing of CORDIC Chip Sandeep R Aedudodla Ashok Verma Meena Ramani Roby Thomas.

Similar presentations


Presentation on theme: "Testing of CORDIC Chip Sandeep R Aedudodla Ashok Verma Meena Ramani Roby Thomas."— Presentation transcript:

1 Testing of CORDIC Chip Sandeep R Aedudodla Ashok Verma Meena Ramani Roby Thomas

2 CORDIC CORDIC: A highly efficient computing technique to compute a variety of elementary functions (Ex. Sine, Cosine,Arctan, Sinh, Cosh, Log, Exp etc). Used extensively in calculators. Makes use of shifter and adder blocks to compute these functions. Does not need a multiplier.

3 Architecture What to Test? 8-bit Latches 8-bit Adder/Subtractor Units A Variable Length 8-bit Barrel Shifter ROM Table 3-bit Counter

4 The Test Plan I DDQ Test : To detect any non-catastrophic defects. Functional Test: Test all logic and memory sub-circuits involved and whether the mathematical functions evaluated are accurate enough. Parametric Test: Test whether Chip meets specifications, such as timing requirements, power consumption etc.

5 Modified Design for Test 0.60730 ADD/SU B Y-OUTX-OUT Y-REGX-REG >>k >>k MUX INPUT ADD/SU B REG-TEMP >>k X-REG >>k MUX XYZ T MUXMUX Z Y X T ROM 3- BIT COU NTE R CL K

6 List of Tests Functional Test : To test the working of various sub-circuits, such as the Latches, Add/Sub Units, Counter, ROM, Shifters. Functional Test Flow: Test Latches followed by Add/Sub Unit, Counter, ROM, Shifter. Full Scan Methodology Planned. Estimated No. of extra pins required: 2 or 3 Used PISO for testing the registers. Used verified Registers to test Add/Sub blocks. Used verified registers and Add/Sub blocks to test the other blocks.

7 List of Tests (contd) Parametric Test : To test the various specification parameters determining Chip – performance. Measurement of Rise and Fall times: Using the ATE’s Time Measurement System (TMS). May need an advanced TMS capable of accuracy less then a nanosecond. Measurement of Power Consumption I DDQ Test : Measures Leakage current at a particular state, by using a current-to-voltage converter on the DIB. State is set by the ATE.

8 Components Required on DIB Buffers to overcome the parasitic capacitance of Tester A Current to Voltage converter (for I DDQ ) A Local Relay Connection to bypass the Current-Voltage Converter CORDIC Buffers I to V Converter Relay GND VDD INPUTS OUTPUTS Contact DUT socket


Download ppt "Testing of CORDIC Chip Sandeep R Aedudodla Ashok Verma Meena Ramani Roby Thomas."

Similar presentations


Ads by Google