1. Toggle Equivalence Preserving (TEP) Logic Optimization Eugene Goldberg (Cadence), Kanupriya Gulati (Texas A&M University) Sunil Khatri (Texas A&M University) IWLS-2007, San Diego, USA This paper is available at http:/eigold.tripod.com/papers/iwls-2007-tep.pdf

2. Summary Example of Logic Synthesis preserving Toggle Equivalence (LS_TE) Escaping Local Minima in LS_TE Novel Convergence Scheme TEP procedure (example) Some experimental results

3. Example … x1x1 xnxn N1N1 N* 1 Circuit N square(x) Circuit N* abs(x) … x1x1 xnxn …y1y1 y 2n … y* 1 y* n y < 100 y* < 10 N2N2 N* 2 zz Subcircuit N 1 is toggle equivalent to N* 1. Subcircuit N 2 is toggle equivalent to N* 2 (under “allowable” input assignments) square(x) < 100  abs(x) < 10

4. Logic Synthesis preserving Toggle Equivalence (LS_TE) Given a single-output combinational circuit N partitioned into subcircuits N 1,..,N k, LS_TE is to produce a new circuit N* : replace each N i with an optimized toggle equivalent N* i. Single-output subcircuits: Toggle equivalence  functional equivalence (modulo negation). Multi-output subcircuits N i and N* i are toggle equivalent if N i (p )  N i (p  )  N* i (p )  N* i (p  ). Definition of toggle equivalence can be extended to the case when N i and N i * have different input variables but there is a one-to-one mapping between “allowed” input assignments.

5. Importance of LS_TE (escaping local minima) … x1x1 xnxn N1N1 square(x) …y1y1 y 2n y < 100 N2N2 abs(x) … x1x1 xnxn … y* 1 y* n R* 1 N* 1 abs(x) … x1x1 xnxn … y* 1 y* n y* < 10 N* 2 N* 1 Re-encoder … y1y1 y 2n y < 100 N2N2 z z z z* Re-encoder R* 2 Even if |N* i | |N i | In terms of equivalent transformations, LS_TE may temporarily increase the circuit size.

6. TEP procedure (first introduction) … x1x1 xnxn M …y1y1 ypyp … x1x1 xnxn M* …y* 1 y* m Let M be a subcircuit N i of N. For the sake of simplicity, we assume that M and M* have identical variables. Problem: Given a multi-output circuit M, build an (optimized) toggle equivalent circuit M*.

7. Toggle Implication Toggle implication (denoted M  M* ) M(p )  M(p  )  M*(p )  M*(p  ). M and M* are toggle equivalent iff M  M* and M*  M Strict toggle implication (denoted M < M* ) if M  M* is true, but M*  M is not M, M* are multi-output circuits

8. Novel Convergence Scheme A TEP procedure, in general, can not re-use the structure of M. Then we need to sovle the convergence problem. Alternatively, the convergence problem is solved by severely restricting the class of implementations we consider. In SIS, it is sums-of-products. In BDDs, it is networks of multiplexers. We build a sequence of circuits M 1,…,M d such that a) M  M i and b) M i < M i-1 This sequence converges to a circuit M* such that a) M  M* and b) M*  M. Usually, the convergence problem is avoided by making functionally equivalent, incremental transformations.

9. Example M 1 = identity; // so M  M 1 repeat {M = rem_toggles(M i ); M i+1 = add_toggles(M );} until (M i+1  M) Targe circuit M* implements x 1  x 2 M1M1 M M2M2 Init. circuit First iter. rem_toggles add_toggles Second iter. M3M3 rem_toggles

10. Experimental Results We successfully applied our TEP procedure a)to simplify large circuits implementing redundant arithmetic expressions b)to optimize small single-output circuits (up to 8 inputs) c)to build toggle equivalent counterparts of small multi-output circuits d) to optimize a cascade of two circuits by LS_TE (TEP procedure was used twice)

11. Conclusions Our TEP procedure can be used for developing new structure-agnostic synthesis algorithms Besides, TEP procedure enables a powerful method of logic synthesis (LS_TE). LS_TE suggests a way to address local minimum entrapment problem LS_TE facilitates informational exchange with the designer (specification describes high-level structure of the circuit)