1. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 1 Machine Organization  Systems (including computers) often have STATE-DEPENDENT behaviour  response to an event at some point in time depends on previous sequence of events  current state: the net accumulated effects of the history of events  state-based models use state variables to encode state information  (have you seen this elsewhere?)

2. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 2 Machine Organization  Example: combination lock (e.g. on lockers) combination sequence: X, Y, Z go right past X twice, then stop at X go left past Y once, then stop at Y go right and stop at Z  model of the lock: input events: position of dial output events: clasp locked/unlocked

3. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 3 Combination Lock  To describe behaviour: need state variables to remember the relevant history of events; E.G.: direction of turning dial, number of times gone past “next combination” number “next combination” number expected whether clasp is locked/unlocked

4. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 4 State Variables state variables input reaction to an input event may change the output and/or state variable values output

5. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 5 Programmer’s Model Recall Programmer’s Model  processor, memory, I/O communicate via bus  inputs and outputs at connected devices  need state variables to model behaviour:  processor:registers  memory:cells  I/O components:ports

6. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 6 Our Computer System Model  Registers:16-bits wide  Cells:8-bit contents, 16-bit address  Address ports:read/write 8-bit values, 16-bit address  Model behaviour of components in terms of state variables

7. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 7 Programming at the Machine Level  at single instruction level: instructions are executed by processor instructions manipulate state variables read, modify, write values  once state variables and instructions are understood, then all of the building blocks available to programmers are known!  there is nothing else !! (not rocket science)

8. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 8 Programming at the Machine Level Program sequences of instructions to  generate outputs in response to inputs  manage information saved in state variables  the intellectual & creative part!

9. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 9 encoding details discussed later Stored Program Concept 1.instructions are encoded into binary values 2.encodings of instructions are loaded into memory 3.processor retrieves and executes instructions from memory (one at a time)  instructions encodings have variable length 1 to 6 bytes not every binary value 1 to 6 bytes long corresponds to an instruction different!

10. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 10  encoded instructions are indistinguishable from encoded information ! (same binary values!) Programs Internally instructions 1 to 6 byte binary values

11. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 11 Computer System Processor Memory I/O Bus Connected Devices keyboard mouse display printer disk drives comm n links etc. registers cells instructions & data ports

12. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 12 Behaviour of Memory  Memory (8-bit cells with 16-bit addresses) contents of cells are persistent contents only change as result of write contents before first write? (power on?) 16-bit addresses: 2 16 different addresses 64K address space –1K = 2 10 = 1024 10; 2 16 = 2 6 2 10 = 2 6 K = 64 K –1M = 2 20 = 1024 K; 1G = 2 30 = 1024 M 64Kb  64 kilobits; 64KB  64 kilobytes

13. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 13 Behaviour of Memory Notation for memory-related behaviour:  write(value, addr) mem[addr] := value  read( addr ) mem[addr]

14. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 14 Some Types of Memory RAM: Read-And-Modify a.k.a. Random Access Memory  can read and write cell contents ROM:Read-Only-Memory  contents “burned in” when manufactured  can’t write new values PROM: Programmable Read-Only-Memory  contents can be programmed once using PROM Programmer (special device) EPROM: Erasable Programmable ROM  program using PROM programmer  can be “erased” by UV exposure EEPROM: Electrically Erasable PROM  reprogram in-circuit! (power-off persistence!)

15. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 15 A Memory Problem  How can binary values wider than 8-bits be stored in 8-bit memory cells ?  Use more than one cell! use consecutive memory cells cannot “address” individual bits in a cell e.g. 2 cells  16-bit values

16. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 16 Endian Memory Storage  New Problem for 16-bit Values: Endian Scheme 2 bytes of value stored in 2 cells 16-bit value: which cell should hold which byte? big endian: (Motorola)  the least significant byte at the high address consecutive memory cells msbyte lsbyte 16-bit value ?

17. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 17 Little Endian Memory Storage little endian (Intel)  the most significant byte at the high address lsbyte msbyte lsbyte memory contents address msbyte X X + 1 16-bit value

18. 20-Sep-0194.201 - Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Sept. 2001 94.201.lecture7-8-compstate 18 Little Endian Memory Storage Little Endian Example: Ouch! Value = 0F23h 23h 0fh 32ADh 32ACh