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CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 09/10/2013 Lecture 5: Combinational Logic Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE.

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Presentation on theme: "CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 09/10/2013 Lecture 5: Combinational Logic Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE."— Presentation transcript:

1 CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 09/10/2013 Lecture 5: Combinational Logic Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE UNIVERSITY, WILBERFORCE, OH 1

2 Review  Last Class  Basic of Logic Design  This Class  Integrated Circuits  Decoder  Multiplexor  PLA  ROM  Don’t Care  Bus  Next Class  Design of ALU

3 Integrated Circuit  Integrated Circuit (IC)  A small electronic device made out of a semiconductor material  Classifications  SSI (small-scale integration) up to 100 electronic components per chip  MSI (medium-scale integration) 100~3,000 electronic components per chip  LSI (large-scale integration) 3,000~100,000 electronic components per chip  VLSI (very large-scale integration) 100,0000 to 1,000,0000 electronic components per chip  ULSI (ultra large-scale integration) More than 1 million electronic components per chip

4 Decoder  Decoder  A logic block that has n-bit input and 2 n outputs, where only one output is asserted for each input combination  If the input is i (in binary), then output i is 1 others are 0

5 Decoder Example  3-8 Decoder

6 Multiplexor  Multiplexor  A selector The output is selected by an input control

7 Implementation of a Multiplexor

8 n-input Multiplexor  A Multiplexor can have n-inputs  Require selective inputs  Implementation of an n-input Multiplexor

9 Two-level Logic  Try to Remember: Any Boolean Logic function can be implemented with only NOT, AND, OR functions  We can also find that all logic functions can be written in a canonical form, in 2 levels  Sum of Product Logical Sum (OR) of terms joined by Product (AND)  Product of Sum Logical Product (AND) of terms joined by Sum (OR)

10 Example  Consider a logic function  Equivalent to sum of products  Equivalent to product of sums

11 In Class Exercise  Considering the following truth table for D, write the function of D using sum of products

12 Answer  Combinations that D is 1  Answer

13 Programmable Logic Array  Programmable Logic Array (PLA)  Two stages of logic An array of AND gates (product terms) An array of OR gates

14 PLA Example  Considering the following table, implement the PLA for D, E, F

15 PLA Example – cont.  A PLA can directly implement the truth table of a set of logic functions with multiple inputs and outputs.  Each entry where the output is true requires a product term  there will be a corresponding row in the PLA  Each output corresponds to a potential row of OR gates in the second stage 15

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17 Another PLA Representation  Dot in the AND plane  Input, or its inverse, occurs in the product term  Dot in the OR plane  Corresponding product term appears in the corresponding output

18 Read Only Memory  Read Only Memory (ROM)  Has a set of locations that can be read  Contents of these locations are fixed  Programmable ROM (PROM)  Can be burnt using a device called a “ROM programmer”  Erasable Programmable Read Only Memory (EPROM)  Data in the ROM can be deleted under ultra-violet rays  EEPROM (Electrically Erasable Read Only Memory)  Data in the ROM can be erased by a simple electric current

19 ROM  Height  m inputs  2 m addressable entries (input lines)  Width  n outputs (functions)  2 n output bits  mxn is the shape of the ROM

20 ROMs and PLAs  PLA is partially decoded  ROM is fully decoded  Contains a full output word for every possible input combination  Always contain more entries than PLA PLA (7 entries) ROM (8 entries – 1 unused)

21 Don’t Care  Don’t Care  We don’t care about the actual values  Output Don’t Care  We don’t care about the value of an output for some input combination  Input Don’t Care  An output only depends on some of the inputs  Advantages of Don’t Care  Easier to optimize the implementation of a logic function

22 Example of Don’t Cares  Original Truth Table

23 Example of Don’t Cares  Output Don’t Cares  Input Don’t Cares

24 Array of Logic Elements  Bus  In logic design, a collection of data lines that is treated together as a single logical signal  Shared collection of lines with multiple sources 32-bit wide 2-to-1 multiplexor

25 Summary  Integrated Circuits  Decoder  Multiplexor  PLA  ROM  Don’t Care  Bus

26 What I want you to do  Review Chapter 1


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