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EKT104 ANALOG ELECTRONIC CIRCUITS [LITAR ELEKTRONIK ANALOG] BASIC BJT AMPLIFIER (PART II) DR NIK ADILAH HANIN BINTI ZAHRI adilahhanin@unimap.edu.my.

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Presentation on theme: "EKT104 ANALOG ELECTRONIC CIRCUITS [LITAR ELEKTRONIK ANALOG] BASIC BJT AMPLIFIER (PART II) DR NIK ADILAH HANIN BINTI ZAHRI adilahhanin@unimap.edu.my."— Presentation transcript:

1 EKT104 ANALOG ELECTRONIC CIRCUITS [LITAR ELEKTRONIK ANALOG] BASIC BJT AMPLIFIER (PART II)
DR NIK ADILAH HANIN BINTI ZAHRI

2 BASIC COMMON-EMITTER AMPLIFIER
The basic common-emitter circuit used in previous analysis causes a serious defect : If BJT with VBE=0.7 V is used, IB=9.5 μA & IC=0.95 mA But, if new BJT with VBE=0.6 V is used, IB=26 μA & BJT goes into saturation; which is not acceptable  Previous circuit is not practical So, the emitter resistor is included: Q-point is stabilized against variations in β, as will the voltage gain, AV Assumptions CC acts as a short circuit Early voltage = ∞ ==> ro neglected due to open circuit

3 COMMON-EMITTER AMPLIFIER WITH EMITTER RESISTOR
inside transistor CE amplifier with emitter resistor Small-signal equivalent circuit (with current gain parameter, β)

4 COMMON-EMITTER AMPLIFIER WITH EMITTER RESISTOR
ac output voltage Input voltage loop Input resistance, Rib Input resistance to amplifier, Ri Voltage divider equation of Vin to Vs Remember: Assume VA is infinite,  ro is neglected

5 COMMON-EMITTER AMPLIFIER WITH EMITTER RESISTOR
So, small-signal voltage gain, AV If Ri >> Rs and (1 + β)RE >> rπ Remember: Assume VA is infinite,  ro is neglected

6 COMMON-EMITTER AMPLIFIER WITH EMITTER BYPASS CAPACITOR
RS R1 R2 RE RC vs vO CC VCC CE Emitter bypass capacitor, CE provides a short circuit to ground for the ac signals Emitter bypass capacitor is used to short out a portion or all of emitter resistance by the ac signal. Hence no RE appear in the hybrid-π equivalent circuit Vo Vs RC RS r ro R1|| R2 gmV Small-signal hybrid-π equivalent circuit

7 VOLTAGE GAIN WITH AND WITHOUT BYPASS CAPACITOR
RS=0.5k R1=56k R2=12.2k RE= 0.4k RC=2k vs vO CC VCC=10V CE Compare the Voltage gain value with and without Bypass Capacitor of the following circuit.

8 VOLTAGE GAIN WITH AND WITHOUT BYPASS CAPACITOR
Voltage gain Measurement Without Bypass Capacitor RS=0.5k R1=56k R2=12.2k RE= 0.4k RC=2k vs vO CC VCC=10V CE

9 VOLTAGE GAIN WITH AND WITHOUT BYPASS CAPACITOR
Voltage gain Measurement With Bypass Capacitor RS=0.5k R1=56k R2=12.2k RE= 0.4k RC=2k vs vO CC VCC=10V CE

10 STABILITY OF VOLTAGE GAIN
Stability : Measure of how well an amplifier maintains its design values over changes Bypassing external RE does produce maximum voltage gain, however there is stability problem because ac voltage depends internal ac emitter resistance, re Where re depends on IE and on temperature

11 COMMON-EMITTER AMPLIFIER WITH EMITTER BYPASS CAPACITOR
Swamping Method Method to minimize effect of re without reducing the voltage gain to minimum value RE is partially bypassed so that reasonable gain can be achieved and the effect of re on the gain can be greatly eliminated RE is formed with two separate emitter resistor, where RE2 is bypassed and RE1 is not Common-emitter amplifier with emitter bypass capacitor

12 DC & AC LOAD LINE ANALYSIS
DC load line Visualized the relationship between Q-point & transistor characteristics AC load line Visualized the relationship between small-signal response & transistor characteristics Occurs when capacitors added in transistor circuit

13 COMMON-EMITTER AMPLIFIER WITH EMITTER BYPASS CAPACITOR
Example 1: Determine the Q-point (VBE=0.7V, β=150, VA=∞) and DC & AC Load Line. Then plot the graph.

14 DC LOAD LINE SOLUTION... KVL on C-E loop

15 DC & AC LOAD LINES FULL SOLUTION

16 AC LOAD LINE ANALYSIS Example 2 Determine the dc and ac load line.
VBE=0.7V, β=150, VA=∞

17 DC LOAD LINE To determine dc Q-point, KVL around B-E loop

18 AC LOAD LINE Small signal hybrid-π equivalent circuit

19 DC & AC LOAD LINES FULL SOLUTION

20 MAXIMUM SYMMETRICAL SWING
Symmetrical sinusoidal signal applied to the input of an amplifier produces an output of symmetrical sinusoidal signal AC load line is used to determine maximum output symmetrical swing If output is out of limit, portion of the output signal will be clipped & signal distortion will occur

21 MAXIMUM SYMMETRICAL SWING
Steps to design a BJT amplifier for maximum symmetrical swing: Write DC load line equation (relates of ICQ & VCEQ) Write AC load line equation (relates ic, vce ; vce = - icReq, Req = effective ac resistance in C-E circuit) Generally, ic = ICQ – IC(min), where IC(min) = 0 or some other specified min collector current Generally, vce = VCEQ – VCE(min), where VCE(min) is some specified min C-E voltage Combination of the above equations produce optimum ICQ & VCEQ values to obtain maximum symmetrical swing in output signal

22 MAXIMUM SYMMETRICAL SWING
Example 3 Determine the maximum symmetrical swing in the output voltage of the following circuit (same as Example 2).

23 MAXIMUM SYMMETRICAL SWING
SOLUTION: From the dc & ac load line, the maximum negative swing in the Ic is from mA to zero (ICQ). So, the maximum possible peak-to-peak ac collector current: The max. symmetrical peak-to-peak output voltage: Maximum instantaneous collector current:

24 SELF-READING Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007 Chapter 6: Basic BJT Amplifiers Page: ,

25 EXERCISE Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007 Exercise 6.5, 6.6, 6.7,6.9 Exercise 6.10 , 6.11


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