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Sprinkler Buddy Presentation #3: “System Level View and Floor Plan / Sizing” 2/07/2007 Team M3 Kartik Murthy Kalyan Kommineni Panchalam Ramanujan Sasidhar.

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Presentation on theme: "Sprinkler Buddy Presentation #3: “System Level View and Floor Plan / Sizing” 2/07/2007 Team M3 Kartik Murthy Kalyan Kommineni Panchalam Ramanujan Sasidhar."— Presentation transcript:

1 Sprinkler Buddy Presentation #3: “System Level View and Floor Plan / Sizing” 2/07/2007 Team M3 Kartik Murthy Kalyan Kommineni Panchalam Ramanujan Sasidhar Uppuluri Design Manager: Bowei Gai “Low Cost Irrigation Management For Everyone ”

2 Current Status Determine Project Develop Project Specifications (refined) Plan Architectural Design (refined) Determination of all components in design Detailed logical flowchart Design a Floor Plan Create Structural Verilog (Main modules done, working on control) Make Gate Level Design and Schematic  Layout  Testing (Extraction, LVS, and Analog Sim.) 

3 A Large and Untapped Market 95 % of the world’s 1.1 billion farmers live in developing nations These farmers are being forced to manually water their crops due to expensive automation solutions

4 Current Solutions: Expensive and Un-Automated Moving towards Drip Irrigation These systems cost from $5 for the most primitive to $600 for larger farms

5 Sprinkler Buddy: The Low Cost, Automated Solution!

6 Computation of Water Output Equation Crop Water Need / Day = KC x ETO KC = Crop factor (from look up table) Look up based on type and stage of crop ETO = (P)(0.46Tmean + 8) P = Mean Daily % of Daylight Hours (from table) T mean = (T max + T min) / 2 T max = sum of previous 32 days of T max / 32 T min = sum of previous 32 days of T min / 32

7 53 Inputs and 2 Outputs Inputs: Max/Min Temperature in degrees Celsius (10 bits ea.) Number representation of crop type (5 bits) Number representation of crop stage (2 bits) Month (4 bits) Water Tank Level (10 bits) Water at Plant (10 bits) Custom System Clock ( 2 bits ) Outputs : Control signal for the electric valve (1 bit) Flag which sets if a water shortage is seen (1 bit)

8 Architectural Changes Three stages 1 st : Loading of new daily temperatures 2 nd : Computation of equation 3 rd : Water Management Mode (New !) Daily UpdateComputation Inputs Water Management

9 Water Management Mode Two Main Functions: Hourly Update of Temps Error Code Check and Valve Control Note: Rest of Circuit is OFF during this time! Water In Tank Water to be Output Water Gauge Reading Error Code & Valve Control Write To Corresponding Register if Necessary

10 Transistor Count … Block (# used)Transistor Count 40:20 Muxes (6)~480 60:20 Muxes (2)~720 Counter (2)~250 KC ROM (1)~778 P ROM (1)~82 Metric Storage SRAMS (2)~2522 Constant Storage ROM (1)~202 Floating Point Adder (4)~3000 Floating Point Multiplier (2)~2800 10 Bit Registers (9)~140 Datapath Logic / Misc.~2000 Total = ~ 31,786

11 Block Size Block (# used)Size Estimate (um) 40:20 Muxes (4)20 x 80 60:20 Muxes (2)20 x 120 Counter (2)12 x 17 KC ROM (4 parts)181 x 8 P ROM (1)70 x 8 Metric Storage SRAMS (2)181 x 60 Constant Storage ROM (1)181 x 8 Floating Point Adder (4)100 x 100 Floating Point Multiplier (2)130 x 130 10 Bit Registers (8)50 x 10

12 Floor Plan To Mux Feedback from Mult Routing into 40:20 Mux From Mux/Roms OFF ! (during most of the day)

13 Design Size Block (# used)Size Estimate (um) 40:20 Muxes (4)20 x 80 60:20 Muxes (2)20 x 120 Counter (2)12 x 17 KC ROM (4 parts)181 x 8 P ROM (1)70 x 8 Metric Storage SRAMS (2) 181 x 60 Constant Storage ROM (1) 181 x 8 Floating Point Adder (4) 100 x 100 Floating Point Multiplier (2) 130 x 130 10 Bit Registers (8)50 x 10 388um x 559 um 1 : 1.44 aspect ratio.2 mm^2 area.142 Transistor Density

14 Metal Directionality M1, M2 Local Connections Ground and VDD M3,M4 Clock Global Routing Control Signals

15 Design Challenges and Implementation Decisions Design ChallengeTranslation to HW Low Power Design Reuse Components Low Power SRAM Shut-off parts of Circuit Ease of Use Error Checking Minimal Intuitive Inputs Restrictions of Sensors 2’s complement to floating point

16 Verilog

17 Problems/Questions Our transistor count is high We are somewhat close to the 2:1 aspect ratio limit Are we being too naïve in the amount of area we are leaving for routing? Need to finalize the control logic to “turn off” the computation part of the circuit…

18 For Next Week Work on gate level conversion Create Initial Schematic Continue to update/revise floor plan as needed

19 References Food and Agriculture Organization of the UN U.S. Department of Agriculture World Water Summit 2006 “Drip Irrigation for Small Farmers: A New Initiative to Alleviate Hunger and Poverty” by Postel et. al. Drip Irrigation Picture : http://www.actwithgenius.org/images/Bucket- kit-diagram-print.gif

20 OTHER SLIDES (just in case…)

21 Daily Update Mode Initially load both temperatures w/min going to a register Using a mux, pick the T Max input to the adder and add it to the previous sum of T Maxes Go into the T Max SRAM and take out the oldest value and replace it with the newest value. Increment the corresponding counter to point to next oldest Take the oldest value obtained, feed it back to the add/sub mux Subtract it from the sum previously computed Take Tmax’s sum and the correct weight, multiply them, and store the result as the new average of Tmax X Repeat All Steps with Tmin!

22 Computation Mode Take the averages from the daily update mode and average them Multiply the result by.46Add 8 to the result Multiply with P from an SRAM lookup Multiply this with the KC From SRAM lookup The Result is now ready!


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