1. MILAN A Model Based Integrated simuLAtioN Framework for Designing Embedded Systems 27 January 2004 Akos Ledeczi Institute for Software Integrated Systems Vanderbilt University milan (hindi): unification, coming together PACC PI Meeting

2. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 2 Administrative Personnel –University of Southern California: Viktor K Prasanna (PI) C S Raghavendra (Co-PI) A Bakshi, S Choi, G. Govindu, S Mohanty, L. Zhou, students –Vanderbilt University: Akos Ledeczi (Co-PI) J Davis, Z Molnar researchers S Mujumdar student Dates –Start : 02-2001 –Expected end: 06-2004 Web site: http://www.isis.vanderbilt.edu/projects/milan/

3. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 3 MILAN Status Model interpreter feeding-back results Model interpreter driving simulators/tools System Generation and Synthesis Tools GME 4 Resource Models Application Models Constraints Mapping Models i i Target System i Functional Simulators High-level Performance Estimators Cycle- Accurate Performance Simulators Design Space Exploration Tools Functional Simulators High-level Power Estimators Cycle- Accurate Power Simulators Design Space Exploration Tools ii i DESERT DesignBrowser Optimization Tool Matlab SystemC ActiveHDL HiPerE Kernel Perf. Est. Mambo SimpleScalar PowerAnalyzer SimplePower Armulator CodeComposer Jouletrack EMSIM MILAN v1.0

4. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 4 MILAN Release Schedule MILAN v0.9 Beta –March 2003 –Initial set of simulators –Documentation, tutorials MILAN v0.95 Beta –June 2003 –Additional simulators –Miscellaneous enhancements MILAN v1.0 –September 2003 –Extensibility toolkit (XTK beta version) –Additional simulators, hardware platforms etc. –DesignBrowser, Optimization tool –Additional tutorials MILAN v1.1 –February 2004 (planned) –GME 4 –Service release –Additional XTK components –Additional simulator integration as needed –Miscellaneous enhancements

5. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 5 Users of MILAN >100 unique downloads since April Selection of energy-efficient architecture for PARIS application –duty-cycle and multi-rate application modeling, design space exploration based on duty-cycle parameters –evaluation of PXA 255, PowerPC, TI DSPs, ProASIC, and Virtex-II –conclusion: low power FPGA + floating pt. coprocessor is the best choice –ongoing effort: evaluate architectures based on memory configuration Energy-efficient ATR application design for using PASTA stack –modeling of PASTA stack and its power-aware features –high-level estimation and profiling for PASTA stack –identification of energy-efficient mapping and scheduling –initial conclusion: up to 2x energy saving through efficient mapping and scheduling of beam-forming using PASTA stack –ongoing effort: identification of operating voltage and device activation schedule for the mapping of the complete ATR application

6. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 6 Recent VU Contributions Continuous release management (Installshield, CVS, website) New simulator integrated: EMSIM New platform/OS supported (PowerPC/Linux) Multiprocessor support for MILAN (MPI) Desert enhancements MILAN Extensibility Toolkit (XTK): –Feedback interpreter generation –GME meta-interpreter –GME Builder Object Network Extension (BonX) –Reusable software solutions GMEclipse

7. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 7 XTK Feedback Interpreter Generator GME Meta-Interpreter GME BonX Reusable Software Libraries –Graph libraries –Graphbuilder These components provide the building blocks that can be used to modify, customize, and extend the MILAN toolset.

8. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 8 GME Meta-Interpreter and BonX Advantages: –Common code base Code reuse Single source –Applicable to all GME paradigms, not just MILAN Shared Object Model Shared object creation process Paradigm Specification Custom Interpreter Interface MetaInterpreter Specific Transformation BonX Specific Transformation

9. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 9 XTK Use Cases Modifying the paradigm –Create new paradigm –Generate paradigm specification file –Use BonX to create the interpreter interface –Modify existing interpreters and software support libraries to support paradigm modifications Adding new interpreter –Utilize XTK components such as BonX and software support libraries to create new interpreter Use software support APIs to develop new interpreter Use BonX to provide new interface if needed Modifying existing interpreters –Modify software support libraries if it’s a generic change –Modify custom interpreter code if the change is specific to one interpreter

10. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 10 GMEclipse GMEclipse Architecture MILAN and GMEclipse GMEclipse development was funded by an IBM Innovation Grant

11. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 11 VU Plans MILAN v1.1, v1.2 releases –February 2004, June 2004 –v1.1 will include comprehensive XTK capabilities Provide customer support –New tutorials (XTK), documentation (XTK) –Integrate new simulators Based on feedback from PAC/C community Port existing interpreters to utilize the XTK –Implement graphbuilder code using BonX Modifications/bug fixes as required –Bugzilla Support PAC/C demonstrations and applications –BAE space application –Raytheon (PARIS) –ISI (PASTA) Complete multiplatform support –via GMEclipse

12. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 12 Recent USC Contributions Modeling and DSE based on duty cycle specification and multi-rate applications Enhanced design space exploration using DesignBrowser Support for optimization Modeling and performance estimation of designs based on reconfigurable devices Documentation –provided input to VU regarding the User Manual –two new tutorials –example end-to-end design space exploration MILAN Releases (with VU) Memory modeling (based on feedback from PARIS) Integration of XPower (based on interactions with Xilinx)

13. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 13 Duty Cycle based DSE in MILAN (I) Duty cycle parameters modeled by MILAN –multi-rate execution different task execute at different rate –multi-rate input (e.g. camera input) HiPerE (High-level Performance Estimator) was enhanced –estimate performance based on duty cycle parameters –estimate performance over a period of time Enhanced system profiling –profile is generated for a period of execution –state transition details for each component over the period of execution T1T2T3 T4T5 T1T2T3 T4T5 T1T4T5 multi-rate duty cycle based execution application model

14. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 14 Duty Cycle based DSE in MILAN (II) Evaluate the designs based on –execution over a period of time (e.g. 10 min.) –number of instances the application is executed (e.g. 100 times) DSE in MILAN follows a hierarchical approach –initially DESERT is used to evaluate the designs based on single instance of application execution and latency constraint –followed by HiPerE to evaluate the selected designs based on a period of execution –for example, a design space of 73,000 for the PARIS project was evaluated in few minutes using the above We have used this approach in the PARIS project for device and architecture selection

15. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 15 MILAN for Reconfigurable Devices (I) Model kernel designs using FPGAs –supports specification of a library of IP cores, associated parameters, and performance –larger blocks are composed of smaller ones –allows selection from available choices of IP cores (e.g. different precision, design, etc.) Parameters register: size PE: #register & size LaoPE: #PEs, #register, & size … PE … linear array of PEs register

16. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 16 MILAN for Reconfigurable Devices (II) Models are associated with the application model through mapping Performance Estimation –using Kernel Performance Estimator –automatically feedback to MILAN models Usage –create library of designs –DSE through evaluation of available choices

17. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 17 USC Plans Memory modeling, DSE based on memory configurations –based on the feedback from the PARIS project –MILAN will support a generic version of memory modeling capability –HiPerE and DesignBrowser are being modified to support performance estimation and DSE based on memory configuration –DSE will evaluate tradeoffs based on on-chip vs. off-chip memory single vs. multiple banks streaming vs. sequential execution Integration of XPower –based on interactions with Xilinx

18. PACC PI Meeting, January 27-28, 2004 http://www.isis.vanderbilt.edu/projects/milan/ 18 Selected Publications Sumit Mohanty and Viktor K. Prasanna, An Algorithm Designer's Workbench for Platform FPGAs, International Conference on Field Programmable Logic and Applications, September 2003. Seonil Choi, Ju-wook Jang, Sumit Mohanty, and Viktor K. Prasanna, Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures, Special Issue on Configurable Computing of the Journal of Supercomputing, Kluwer. Sumit Mohanty and Viktor K. Prasanna, A Hierarchical Approach for Energy Efficient Application Design Using Heterogeneous Embedded Systems, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, October 2003. Jingzhao Ou, Seonil Choi, Gokul Govindu, and Viktor K. Prasanna, Creating Parameterized and Energy- Efficient System Generator Designs, Annual Military and Aerospace Programmable Logic Devices International Conference, September 2003. Egor Andreev, Sumit Mohanty, and Viktor K. Prasanna, A Modeling and Exploration Framework for Mapping of Linear Array of Tasks onto Adaptive Computing Systems, Annual Military and Aerospace Programmable Logic Devices International Conference, September 2003. Gokul Govindu, Seonil Choi, and Viktor K. Prasanna, Analysis of High-performance Floating-point Arithmetic on FPGAs, submitted to Reconfigurable Architectures Workshop, 2004. Gokul Govindu, Seonil Choi, Vikash Daga, Viktor K. Prasanna, Sridhar G., and Sridhar V., A High- Performance and Energy-efficient Architecture for Floating-point based LU Decomposition on FPGAs, submitted to Reconfigurable Architectures Workshop, 2004.