Presentation is loading. Please wait.

Presentation is loading. Please wait.

CPU Internal memory I/O interface circuit System bus

Similar presentations


Presentation on theme: "CPU Internal memory I/O interface circuit System bus"— Presentation transcript:

1 CPU Internal memory I/O interface circuit System bus Micro-computer main board Hardware system Software system Battery, chassis peripherals Monitor program, BIOS Operating system: DOS, Windows, UNIX, Linux Micro-computing system System software Program design language Application software Middleware Language processing program Assembler Interpreter Compiler Service program Machine language Assembly language High-level language Object-oriented language

2 Introduction to Computing
Chapter 0 Introduction to Computing

3 0.1 Numbering and Coding System

4 0.1 Numbering and Coding System

5 0.1 Numbering and Coding System
Binary Numbers Each digit (bit) is either 1 or 0 Each bit represents a power of 2 MSB – most significant bit LSB – least significant bit

6 0.1 Numbering and Coding System
Binary Addition Starting with the LSB, add each pair of digits, include the carry if present.

7 0.1 Numbering and Coding System
Hexadecimal Addition Divide the sum of two digits by the number base (16). The quotient becomes the carry value, and the remainder is the sum digit. 1 1 A B 78 6D 80 B5 21 / 16 = 1, rem 5

8 0.1 Numbering and Coding System
Hexadecimal Subtraction When a borrow is required from the digit to the left, add 16 (decimal) to the current digit's value: = 21 -1 C6 75 A2 47 24 2E

9 0.1 Numbering and Coding System
Translating Binary to Decimal Weighted positional notation shows how to calculate the decimal value of each binary bit: dec = (Dn-1  2n-1) + (Dn-2  2n-2) (D1  21) + (D0  20) D = binary digit binary = decimal 9: (1  23) + (1  20) = 9

10 0.1 Numbering and Coding System
Translating Unsigned Decimal to Binary Repeatedly divide the decimal integer by 2. Each remainder is a binary digit in the translated value: 37 =

11 0.1 Numbering and Coding System
Translating Binary to Hexadecimal Each hexadecimal digit corresponds to 4 binary bits. Example: Translate the binary integer to hexadecimal: Binary (2) equals hex 16A794 (16)

12 0.1 Numbering and Coding System
Converting Hexadecimal to Decimal Multiply each digit by its corresponding power of 16: dec = (D3  163) + (D2  162) + (D1  161) + (D0  160) Hex 1234(16) equals (1  163) + (2  162) + (3  161) + (4  160), or decimal 4,660 (10) Hex 3BA4 (16) equals (3  163) + (11 * 162) + (10  161) + (4  160), or decimal 15,268 (10)

13 decimal 422 (10) = 1A6 (16) hexadecimal
0.1 Numbering and Coding System Converting Decimal to Hexadecimal decimal 422 (10) = 1A6 (16) hexadecimal

14 0.1 Numbering and Coding System
Signed Integers The highest bit indicates the sign. 1 = negative, 0 = positive

15 0.1 Numbering and Coding System
Forming the Two's Complement Negative numbers are stored in two's complement notation

16 0.1 Numbering and Coding System
Convert signed binary to decimal Starting value (2) Step 1: Reverse the bits Step 2: Add 1 to the value from step Step 3: Form the two’s complement Step 4: Covert to decimal and attach sign (10)

17 0.1 Numbering and Coding System
Convert signed decimal to binary Starting value (10) Step 1: Convert the absolute value into binary (2) Step 2: Reverse the bits (2) Step 3: Form the two’s complement (2)

18 0.1 Numbering and Coding System
Convert signed decimal to hexadecimal Starting value (10) Step 1: Convert the absolute value into hexadecimal B(16) Step 2: Form the two’s complement D5(16)

19 0.1 Numbering and Coding System
Convert signed hexadecimal to decimal Starting value D5(16) Step 1: Form the two’s complement B(16) Step 4: Covert to decimal and attach sign (10)

20 0.1 Numbering and Coding System
ASCII code Standard ASCII (0 – 127) Extended ASCII (0 – 255) 0: 30H 1: 31H A: 41H a: 61H B: 42H b: 62H

21 0.2 Digital Primer Logic gates AND OR NOT (Inverter) XOR NAND NOR
Digital gate diagram for AND Logic gates AND OR NOT (Inverter) XOR NAND NOR Tri-state buffer Digital gate diagram for OR Digital gate diagram for NOT

22 0.2 Digital Primer Logic gates

23 0.2 Digital Primer Logic gates

24 0.2 Digital Primer Logic gates NMOS AND gate AND gate using diodes

25 Some important terminology
0.3 Inside the Computer Some important terminology byte word

26 Some important terminology
0.3 Inside the Computer Some important terminology byte word

27 0.3 Inside the Computer Internal organization of computers

28 Basic architecture of computer
Arithmetic unit Input Device Memory storage unit Output Device Control unit Basic architecture of computer

29 The storage of program and data
address content No.1 Instruction 1 No.2 Instruction 2 Instruction 3 program Instruction n data 21 data 12 data data 117 data 13 Intermediate results Final results The storage of program and data

30 0.3 Inside the Computer Internal working of computers

31 Homework P18: 4, 6 P19: 15


Download ppt "CPU Internal memory I/O interface circuit System bus"

Similar presentations


Ads by Google