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Practical Digital Design Considerations Review of Concepts Created February 2008 ©Paul R. Godin
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Introduction ◊There are many considerations that must be taken into account when designing digital logic circuits. ◊We have discussed each of the issues one-by- one. ◊Now that we understand the individual issues, we can re-visit the concepts discussed in the practical design section and apply them to circuit design as a whole.
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Specialized Gate Configurations ◊Specialized applications call for specialized gate configurations ◊Open Collector / Open Drain ◊Tri-State ◊Totem Pole
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Gate-to-Gate Connections ◊Specific calculations are required for gate-to-gate connections ◊Noise margin and interface voltages ◊Fanout and gate current ◊Propagation delay ◊Buffers and drivers
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Communication Links and Bus Issues ◊Bus Communications require special consideration for design and use ◊Resistance, Inductance and Capacitance issues ◊Bus Contention ◊Noise and Filters ◊Isolation
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Power and Grounds ◊Appropriate power supplies and grounding must be considered as part of the digital logic design ◊Vcc/Vdd, Icc/I T ◊Ground type ◊Isolation ◊Ground Loops ◊Decoupling
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Special Purpose Circuits ◊Specialized circuits require special considerations ◊Filters ◊Power-Up Circuits ◊Relays ◊Transistors
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High Frequency ◊High frequencies increase negative effects. ◊Digital waveform due to RLC ◊Noise ◊Grounds and supplies
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RLC Effects
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Capacitance – Negative Effects ◊Increases signal delay ◊Transforms steep edges to soft edges ◊Adds load to high frequency applications ◊Increased frequency = more current = more resistive power loss ◊Effects increase with frequency (Xc)
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Capacitance – Positive Applications ◊Filters Noise ◊Decoupling ◊Passive filter circuits ◊Used in specialized circuits: ◊Reset on power-up (delay) ◊Time delay circuits ◊Monostables ◊Astables ◊Touch triggering
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Dealing with Capacitance ◊Reduce conductor/bus lengths ◊Use proper bus/cable construction techniques ◊dielectric ◊distance between conductors ◊Use devices with lower input capacitance for high frequency applications (TTL better than CMOS) ◊Use Schmitt-triggered buffers to reconstruct edges.
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Inductance – Negative Effects ◊EMI/RFI noise ◊Internal sources (adjacent conductors) ◊External sources (ambient or transient) ◊Transient response (voltage spike on a coil)
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Inductance – Positive Applications ◊Relays ◊Filters ◊Sound (speakers) ◊Movement (motors / solenoids)
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Dealing with Inductance ◊Reduce conductor/bus lengths ◊Increase distance from sources of noise ◊Shield conductors/circuits ◊Metallic shields ◊Circuit board design ◊Routing of conductor/bus ◊Specialized solutions: ◊Add diodes to relay coils
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Resistance – Negative Effects ◊Voltage drops ◊Power loss ◊Decreased current with high R ◊Increased current with low R (fanout limitation) ◊Timing losses (with ever-present capacitance)
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Resistance – Positive Applications ◊Current limiting for loads ◊Pull-up / Pull-down ◊Timing-based circuits
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Dealing with Resistance / Loads ◊Shorter conductors ◊Greater cross-sectional area for conductors ◊Select devices that require less current ◊Decoupling capacitors on power supply ◊Use interface circuits such as: ◊Relays ◊Transistors or other switching devices ◊Specialized ICs (drivers/buffers)
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Case Studies
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Oscilloscope and Grounds: Case 1 ◊The oscilloscope probe is connected to earth ground. The digital circuit has a common ground. ◊Can the ground of the scope be connected to the common ground? Are there any considerations? Digital Circuit Oscilloscope
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Design Considerations Case 2 1.Contrast the advantages and disadvantages of each circuit. 2.State what is missing from both circuits Power Supply
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Knowledge Base for Case 2 ◊Larger conductors have less resistance. ◊Resistance on a ground conductor affects signals due to resistive voltage drops. In copper conductors the length and cross-sectional area affect resistance. ◊Noise on a shared connection. ◊Switching noise from one system can affect another if they share a ground connection. ◊Decoupling capacitors are needed. ◊Switching noise affects signals. Use: ◊0.01 µF between Vcc and Ground at each IC ◊0.1 µF for every 5 Ics ◊The power supply should have appropriate filtering
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Design Considerations: Case 3 ◊Two digital circuits that utilize different power supplies need to be interfaced. ◊Should there be a common ground between the power supplies? ◊What are some considerations? Digital Circuit 2 Digital Circuit 1 Power Supply 1 Power Supply 2
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END ©Paul R. Godin prgodin @ gmail.com
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