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Data acquisition system for the Baikal-GVD neutrino telescope Denis Kuleshov Valday, February 3, 2015
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1. GVD DAQ architecture 2. Basic elements of the telescope: - Optical module and measuring channel - OM Section and String - GVD Cluster - Underwater Cluster network 3. Reliability Summary OUTLINE
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GVD DAQ architecture Cluster DAQ center Section electronic module Optical module String electronic module SECTION STRING Basic principles of GVD design: - Simplicity of all elements; - Deployment convenience from the ice cover; - Detector extensibility and configuration flexibility. Basic GVD elements -Optical module (OM); -Section: 12 OM (spaced by 15 m) Section electronic module (12-ch FADC) -String: 2 or 3 Sections & String electronic module -Cluster: 8 strings & DAQ center. R ~ 60 m H~ 350 m Cluster with 8 two- section strings
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Optical module and measuring channel HV converter: SHV 12-2.0 K 1000 P 0 …+ 2000 VDC, stability 0.05% ripple and noise 8 mVpk-pk Passive divider: 18 M 2-channel amplifier: Output channel and PMT noise monitoring channel. 2 LEDs L7113: 470 nm, 5-7 ns - regulation of intensities in the range 1…~10 8 photons (100m Baikal water) - LED pulse delay regulation: 0 … 1000 ns Slow control board: SiLabs C8051F121 Control of electronics operation and monitoring of PMT parameters via RS485 interface. OM electronics Mu-metal cage PMT Optical gel Glass sphere VETROVEX (17”) Optical module design: as simple as possible. OM SEM PMT: 10 7 Ampl.ADC Board 90 m coax. cable
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GVD Section 12-channel ADC unit: PMTs analog pulse conversion, time synchronization, data processing, local trigger. Data transmission: Two outputs of ADC board: optical output (for future detector extension) and 100 BASE-TX (present stage). shDSL modem: Extending the Ethernet line up to 1 km. Slow control board: OM power on/off and control of OM operation (RS-485). Flash ADC (AD9430) 12bit, 200 MSPS FPGA (Xilinx Spartan 6) Enable to on-line data filtration. Cut the pulses from data frame and paste to output data stream. Rejection factor : 50-100 Section electronic module Optical output Section (basic DAQ cell) – 12 OM and Section electronics module (SeM).
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Functional scheme of one FADC channel FPGA FADC (AD9430) 12bit, 200 MSPS FPGA (Xilinx Spartan 6) - Trigger logic: 2-level adjustable digital comparator forms low threshold L and high threshold H channel requests (section trigger is L&H coincidence of neighboring channels). - Data channel (triggered) consists of double-buffered memory and data transmitter. - Monitor channel (non-triggered) includes peak detector and amplitude analyzer. LED pulse Noise Waveform stamp example (5 mks) Single PE pulses Monitor histogram examples Monitor channel Data channel ADC channel
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Trigger Commutator: splits for the section acknowledges & combines requests. Data transmission: DSL line. Power Commutator: Controls power to the SEM, OMs and peripherals. String communication module combines 2 or 3 sections. Functions: GVD String Functional scheme of Power Commutator
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8 GVD Cluster Cluster - a full functional detection system, working both independently and as a part of the full detector. Cluster – 8 strings and DAQ center. DAQ center: trigger logic, string power supply, communication to shore. Cluster center electronics is located in 3 glass spheres and metallic box for optical cable attachment “optical box”. Optical box Cluster DAQ center
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9 GVD Cluster Power Module: 300VDC 12-ch manageable commutator. Optical Box: conversion 1000 BASE-FX to 100 BASE-TX. Data module: 8 DSL-modems for transmission the string data. 8-channel COM-server for DSL speed control. Trigger Module: 12-channel ADC unit: 8 string trigger requests, global trigger for 8 strings.
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10 Cluster underwater network Segments of underwater network: 1. Section electronics module – String module 2. String module – Cluster DAQ center 3. Cluster DAQ center – Optical box 4. Optical box – Shore DAQ center 100…200 Hz data event rate are expected for the basic trigger L×H. SectionLine speed, Кbit/sSNR, dB String 1 704011 String 2755212 String 31004811 String 41004810 String 51004812 SegmentLengthData rateLine speedTechnique 1100…300 m1 Mbit~10 MbitshDSL 2~1000 m3 Mbit~10 MbitshDSL 33 m25 Mbit100 Mbit100 BaseTX 4~6000 m25 Mbit1000 Mbit1000 BaseFX (1) Slow data transmission (triggered mode): OM coincidences produce a trigger that rejects the PMT noise. (2) Fast data transmission * : optical line from ADC module to Shore Center (all data to shore). Possibility to use two modes of operation: Data line speed in 2014
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1. Optical modules: The OM electronics failure rate: 3 OM / 140 / Year - 1 OM: HV control system. Failure of the OM controller. - 2 OM: not connection via RS485 bus (out of operation at April 2014). Probable reason is transient error of the slow control board (it was modernized in late 2014). 2. Cable communications: 2 cables are out of operation. Reason - old technology of the sealing (cables of 2011). New sealing technology is applied after 2012. 3. Network devices a) Industrial devices (Switches, Eternet-RS485 converters, IEX-402 DSL) – no failure b) Non-industrial DSL-modems: - Unreliable connection to 1 string at 2013 and 1 Section at 2014. We plan to use industrial IEX-402 shDSL, that were presented by MOXA firm at 2013. 4. ADC boards - no failure. 5. Glass sphere and Connectors - no failure. 6. Power supply units (300 VDC commutators, DC/DC converters) - no failure Reliability (without long-term laboratory tests and stress tests) Results from 2011 up to end of 2014
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Summary 1. DAQ system was tested with 5-strings engineering array and will be applied for GVD-Baikal full functional Cluster in this year. 2. Baikal-GVD technical design is basically finalized. 3. Next step of the DAQ development is investigation the possibility to use optical connections with sections. - Optical hybrid cable is designed (connection between Cluster Center and Shore) - Optical output of ADC board (SEM) is foreseen. - Optical connectors ???
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Backup slides
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16 FADC (AD9430) 12bit, 200 MSPS FPGA (Xilinx Spartan 6) - Trigger logic: 2-level adjustable digital comparator forms low threshold L and high threshold H channel requests - Data channel (triggered) consists of double-buffered memory and data transmitter. - Monitor channel (non-triggered) includes peak detector and amplitude analyzer. ADC board 12-ch 200 MSPS ADC - Trigger logic(L&H coincidence of neighboring channels - Data readout from ADC buffer - Control of OM mode of operation - Connection via local Ethernet to the cluster DAQ center
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Triggering and Data Transmission SECTION CLUSTER
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Prototype arrays: 2012: 36 OM, 2013: 72 OM, 2014: 120 OM A summarized time of the OMs operation is ~170 years 3 OM failures during this period: - 1 OM: HV control system out of operation (2013). - 2 OM: not reliable connection via RS485 bus (2014). The OM electronics failure rate ~2% / year Repairing possibility: 8% / year for 100 strings installation (GVD Phase 1). OM reliability (without stress tests of electronics during prototyping phase ) Results from 2012 to 2014
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