1. Maze Routing
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2. Improvement to Lee’s Algorithm
Improvement on memory:
Aker’s Coding Scheme
Improvement on time:
Starting point selection
Double fan-out
Framing
Hadlock’s Algorithm
Soukup’s Algorithm
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3. Aker’s Coding Scheme to Reduce Memory Usage
“A Modification of Lee’s Path Connection Algorithm”, S.B. Akers, IEEE Transactions on Electronic Computers, pages 97-98, Feb
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4. Aker’s Coding Scheme
For the Lee’s algorithm, labels are needed during the retrace phase.
But there are only 2 possible labels for neighbors of each vertex labeled i, which are, i-1 and i+1.
So, is there any method to reduce the memory usage?
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5. Alternative Paths A B 2 3 4 5 6 7 8 9 10 11 12 1
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6. Aker’s Coding Scheme
One bit (independent of grid size) is enough to distinguish the two labels. S
Sequence:
??? ...… (what sequence?)
(Note: In the sequence, the
labels before and after each
label are always different.) T
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7. Improving Lee’s Algorithm
The choice of the starting pin can affect the speed of the algorithm,
one guideline is to start on the pin farthest from the center of the chip
Use double fan out
- begin at both pins and continue until a point of contact is made
Use framing,
an artificial rectangular boundary 10 to 20% larger than the boundary formed by the pins
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8. Schemes to Reduce Run Time
1. Starting Point Selection:
2. Double Fan-Out: 3. Framing: T S S T S S T T
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9. Multi-Terminal Nets
For a k-terminal net, connect the k terminals using a rectilinear Steiner tree with the least wire length on the maze.
This problem is NP-Complete!
So, just want to find some good heuristic.
This problem can be solved by extending the Lee’s algorithm. Any idea …..
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10. Connecting Multipoint Nets
One point is selected as the source and all the other points are the target
propagate from the source until one target is reached
find the path from the source to that target
all the cells on the path are labeled as source cells and the remaining unconnected pins are targets
repeat the steps
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11. Example 4 4 5 3 3 2 2 1 1 S T
Start at the source and run the maze router until you hit a target
Every cell on the path is a source – run the maze router
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12. Soukup’s Algorithm to Reduce Run Time
“Fast Maze Router”, J. Soukup, DAC 1978, p
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13. Soukup Router
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14. Basic Idea 2 2 2 1 1 S 1 1 1 1 T 2 1 1 2 2
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15. Soukup Router Algorithm
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16. Hadlock’s Algorithm to Reduce Run Time
“A Shortest Path Algorithm for Grid Graphs”, F.O. Hadlock, Networks, 7: , 1977.
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17. Hadlock’s Algorithm Detour Number: For a path P from S to T,
d(P) = # of grids directed away from T, then
L(P) = MD(S,T) + 2d(P)
So minimizing L(P) and d(P) are the same.
Length
Manhattan Distance D D
D: Detour
d(P) = 3
MD(S,T) = 6
L(P) = 6+2x3 = 12 D S T
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18. Hadlock’s Algorithm
Label vertices with detour numbers instead of distance.
Vertices with smaller detour number are expanded first.
Therefore, favor paths without detour. 3 2 2 3 2 1 1 1 S 1 1 2 T 2 1 1 2 2 3 2 2 2 2 2
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19. Hadlock’s Algorithm
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20. Multilayer Routing Give a system with multiple wire layers
Parallel grids vertically stacked, one for each layer
Use vias to access other layers
Label cells as to whether a via is permitted at its location
How do we find wire paths in such a structure?
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21. Multilayer Routing
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22. Aside: VIAs Vias: Issue: size “Vertical” electrical connection
On chips, vias are usually a lot bigger than wire widths so you have to be careful where you put them
You can’t put vias as close to each other as you can put wires
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23. Example
Given two metal layers with vias allowed in some cells (labeled as ‘v’) 2 4 5 3 1
Expansion
may go up
and down
as well as
to adjacent
cells v S T v v
Layer 1
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Layer 2

24. References
David Pan, VLSI Physical Design Automation, Lecture Slides, University of Texas, 2009.
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