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Centralized switching networks Computer Architecture AMANO, Hideharu Textbook pp. 92~13 0
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Switch connected parallel machines Where the switches are used? PU-Memory connection: UMA Node-node connection: NUMA, NORA Snoop is impossible Directory based methods or compiler assisted methods are used for UMA/NUMA How to build large scale systems
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Switch connected UMA Switch Local Memory CPU Interface Main Memory ........ ….…. Local Memory is sometimes dispensable
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Switch connected UMA Blocking Switch Local Memory CPU Interface Main Memory n ........ 1 ….…. 0 1 n 0 Shared Memory
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Switch connected UMA Interleaving Switch Local Memory CPU Interface Main Memory n ........ 1 ….…. 0 Shared Memory ….…. ….…. Size: Double word or Cache Line
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Switch connected UMA with circular connection Switch CPU Interface Main Memory ........ ….…. Main memory is used as a home memory Interleave is often difficult
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Switch connected NUMA Switching Fabrics … Symmetric Multi-Processor Switching Fabrics sometimes become hierarchical structure → Fat Tree Directory based Cache coherent methods are used → CC-NUMA Typical recent high performance server: SUN’s or IBM’s
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Switch based network Single stage Crossbar Multi-stage Symmetric: Multistage Interconnection Network Asymmetric: Fat-tree, base-m n-cube → Direct interconnection network
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Crossbar switch n m Cross point: small switching element The number of cross points: nxm Extension of the buses
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Non-blocking property n m For different destination, conflict free
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Head Of Line (HOL) conflict n m X Arbiter is required for each bus The buffer is required The number of cross point is not dominant.
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Input buffer switch Crossbar Input buffer One of conflicting packets is selected. Others are stored Into the input buffer
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Merit/demerit of Crossbars Non-blocking property Simple structure/Control The hardware for cross-points usually do not limit the system (Fallacy of crossbars) Extension is difficult by the pin-limitation of LSIs If pins can be used, a large crossbar can be constructed → Earth simulator
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Earth Simulator (2002,NEC) Vector Processor … 017 Shared Memory 16GB Vector Processor … 017 Shared Memory 16GB Vector Processor … 017 Shared Memory 16GB …. 639 Inputs crossbar (16GB/s x 2) Node 0 Node 1Node 639 Peak performance 40TFLOPS
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SUN T1 Core Crossbar Switch FPU L2 Cache bank Directory L2 Cache bank Directory L2 Cache bank Directory L2 Cache bank Directory Single issue six-stage pipeline RISC with 16KB Instruction cache/ 8KB Data cache for L1 Total 3MB, 64byte Interleaved Memory
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Glossary 1 Symmetric: 対象型、どこからでも同じ遅延、手順でアクセス可 能 Asymmetric: 非対象型、遅延、手順が異なる Non-blocking, blocking: 出力ポートが重ならなければ、衝突が起 きないのがノンブロッキング、出力ポートが重ならなくてもス イッチ内部で衝突するのがブロッキング HOL conflict: 出線競合、出力ポートが重なることで起きる衝突 Interleave: インタリーブ、ワード単位など細かいレベルでアド レスを分離して同時アクセスを増やす方法 Multi-stage/Single-stage: スイッチを多段に接続するか、単一段 で接続するかの構成の違い。 Multi-stage Interconnection Network を MIN と呼ぶ
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MIN ( Multistage Interconnection Network) Multistage connected switching elements form a large switch. Symmetric Smaller number of cross-points, high degree of expandability Bandwidth is often degraded Latency is stretched
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Classification of MIN Blocking network : Conflict may occur for destination is different :NlogN type standard MIN,πnetwork, Re-arrangeable : Conflict free scheduling is possible : Benes network 、 Clos network ( rearrangeable configuration ) Non-blocking : Conflict free without scheduling : Clos network (non-blocking configuration) 、 Batcher-Banyan network
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Properties of MIN Throughput for random communication Permutation capability Partition capability Fault tolerance Routing
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Blocking Networks Standard NlogN networks Omega network Generalized Cube Baseline Pass through ratio (throughput) is the same. Π network
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Omega network The number of switching element (2x2, in this case ) is 1/2 N x LogN 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111
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Perfect Shuffle Rotate to left 000 001 010 011 100 101 110 111 000 010 100 110 001 011 101 111 Inverse Shuffle Rotate to right
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Destination Routing 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 Check the destination tag from MSB If 0 use upper link, else use lower link. 1→ 3 0 1 1 5→65→6 1 1 0
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Blocking Property For different destination, multiple paths conflict 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 X 0→00→0 4→24→2
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For using large switching elements ( Delta network ) In the current art of technology, 8x8 (4x4) crossbars are advantageous. 00 01 10 11 20 21 30 31 00 01 10 11 20 21 30 31 01230123 01230123 1 2 Shuffle connection is also used.
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Omega network The same connection is used for all stages. Destination routing A lot of useful permutations are available. Problems on partitioning and expandability.
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Generalized Cube 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 000 100 110 100 101 Links labeled with 1bit distance are connected to the same switching element. 000 010 000 001
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Routing in Generalized Cube 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 The source label and destination label is compared (Ex-Or ): Same(0) : Straight Different (1) : Exchange 001→011 010 0 1 0
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Partitioning 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 The communication in the upper half never disturbs the lower half.
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Expandability A size of network can be used as an element of larger size networks
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Generalized Cube Destination routing cannot be applied. The routing tag is generated by exclusive or of source label and destination label. Partitioning Expandability
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Baseline Network 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 The area of shuffling is changed. 001 100 010 001 3bit shuffle2bit shuffle
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Destination Routing in Baseline network 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 Just like Omega network 1 1 0
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Partitioning in Baseline 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111
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Baseline network Providing both benefits of Omega and Generalized Cube Destination Routing Partitioning Expandability Used in NEC’s Cenju
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Π network Tandem connection of two Omega networks 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111
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Bit reversal permutation (Used in FFT) Conflicts occur in Omega network. 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 0426153704261537 01230123 45674567
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Bit reversal permutation in Π network 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 0426153704261537 0527143605271436 The first Omega : Upper input has priority. The next Omega : Destination Routing Conflict free
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Permutation capacity All possible permutation is conflict free = Rearrangeable networks Tree tandem connection of Omega network is rearrangeable. The tandem connection of Omega and Inverse Omega (Baseline and Inverse Baseline) is rearrangeable. Benes network
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Benes Network Note that the center of stage is shared. The rearrangeable network with the smallest hardware requirement. 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111
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Non-blocking network Clos network m>n1+n2-1 : Non-blocking m>=n2 : Rearrangeable Else: Blocking
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Clos network... n1xm r1xr2mxn2 r1 m r2r2 m=n1+n2-1 : Non-blocking m=n2 : Rearrangeable m<n2 : Blocking The number of intermediate stage dominates the permutation capability. 3-stage
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Batcher network 5704213657042136 5740126357401263 0457632104576321 0123456701234567 Bitonic sorting network
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Batcher-Banyan 5704213657042136 5740126357401263 0457632104576321 0123456701234567 Sorted input is conflict free in the banyan network Omega Baseline
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Banyan networks Only a path is provided between source and destination. The number of intermediate stages is flexible. Approach from graph theory SW-Banyan , CC-Banyan , Barrel Shifter Irregular structure is allowed.
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Batcher-banyan If there are multiple packets to the same destination, the conflict free condition is broken → The other packets may conflict. The extension of banyan network is required. The number of stages is large. → Large pass through time The structure of sorting network is simple.
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Classification of MINs Omega Baseline Generalized Cube π Benes Clos Batcher Banyan Blocking Rearrageble Nonblocking
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Fault tolerant MINs Multiple paths Redundant structure is required. On-the-fly fault recovery is difficult. Improving chip yield.
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Extra Stage Cube (ESC) An extra stage + Bypass mechanism 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 X If there is a fault on stages or links, another path is used.
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The buffer in switching element Conflicting packets are stored into buffers. 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111
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Hot spot contention Buffer is saturated in the figure of t ree ( Tree Saturation) 000 001 010 011 100 101 110 111 Hot spot
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Relaxing the hot spot contention Wormhole routing with Virtual channels → Direct network Message Combining Multiple packets are combining to a packet inside a switching element (IBM RP3) Implementation is difficult (Implemented in SNAIL)
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Other issues in MINs MIN with cache control mechanism Directory on MIN Cache Controller on MIN MINs with U-turn path → Fat tree
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Glossary 2 Rearrange-able: スケジュールすることにより、出力が重ならな ければ内部で衝突しないようにできる構成 Perfect shuffle: シャッフルは、トランプの札を切る時に使う単語 だが、ここでは、配線のつなぎ方の方式のひとつ。 Inverse shuffle は逆シャッフルと呼ばれ、逆接続方式。 Destination routing :目的地のラベルだけで経路を決める方法 Permutation: 並び替え、順列のことだが、ここでは目的地ラベル が重ならない経路を無衝突で生成することができる能力のこと Partitioning: ネットワークを分離して独立に使える能力のこと Fault tolerance: 耐故障性。一部が故障しても全体がダウンしない ような性質、 Fault tolerant MIN は複数経路を持たせた MIN Expandability: 拡張性、小さなものからサイズを大きくしていくこ とのできる性質 Hot spot contention: 局所的に交信が集中して、これが全体に波 及すること。 Tree saturation: Hot spot contention によりネットワークが木の 形で飽和していく現象。特に MIN で起きる。 Message Combining は、メッセージをくっつけてまとめることによりこれを防止する 方法の一つ
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Exercise Every path between source and destination is determined with the destination routing in Omega network. Prove (or explain) the above theory in Omega network with 8-input/output.
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