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Back End Downconverter Wes Grammer NRAO March 15-17, 2012EOVSA Preliminary Design Review1.

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Presentation on theme: "Back End Downconverter Wes Grammer NRAO March 15-17, 2012EOVSA Preliminary Design Review1."— Presentation transcript:

1 Back End Downconverter Wes Grammer NRAO March 15-17, 2012EOVSA Preliminary Design Review1

2 Outline Design requirements Block diagram and cascade analysis Spurious analysis Component selection Module & rack-level packaging Interfaces (mechanical and electronic) Production assembly and test Costing and schedule March 15-17, 2012EOVSA Preliminary Design Review2

3 Back End Downconverter Design Requirements and Specifications Convert selected 0.5 GHz-wide RF sub-band to baseband frequency (650 - 1150 MHz) SMF input w/mux’d dual lin. polarizations, 1-18 GHz RF Overall Tsys < 400K, at ambient (~298K) Gain stability < 1%, phase stability < 1°, over TBC sec. Baseband output power: -2 dBm, nom., both channels Spurious and harmonic suppression: -57 dBc, min. Monitor and control: – Serial I/O bus, RS-485 signaling, ~1.0-3.5 Mbps asynchronous transfer – 100 us max. overall latency for output level (step attenuator) control, including serial data transfer delays Rack-mountable unit, with high packing density Environment: Indoor, temperature control MTBF > 15 years March 15-17, 2012EOVSA Preliminary Design Review3

4 Downconverter Module Block Diagram March 15-17, 2012EOVSA Preliminary Design Review4

5 March 15-17, 2012EOVSA Preliminary Design Review5

6 System Cascade Analysis Key results, after optimization: – Overall Tsys < 330K up to -50 dBm, but rises way over 400K for strongest input Extra attenuation for signal leveling in Front End, along with high link loss make Tsys sensitive to component loss in the Downconverter, esp. in 1 st IF stage. An isolator is used for a low- loss signal match before 2 nd mixer. Effect is greatly reduced by driving optical TX harder (+11 dBm). Overall Tsys is still slightly higher than spec, ~420K Increasing 1 st amp gain helps, but limited by mixer P1dB Alternatively, extra gain can be added between the mixers, but at significant extra cost and added complexity. – 1 st mixer is ~4 dB under P1dB in worst case Higher LO drive helps, but only 2-3 dB may be available over nom. +10 dBm, because of high loss in LO distribution at 38 GHz March 15-17, 2012EOVSA Preliminary Design Review6

7 Spurious Analysis Excel document in archive contains detailed analysis of spurious outputs and harmonics, and filter specs Summary of key results: – Neither mixer evaluated for the 1 st conversion stage has required spurious suppression, but one (Marki M9-0942) comes close at all but lowest frequencies. – Based on the RF-IF isolation of the 1 st mixer, the 18 GHz LPF in the Front End need to have at least 53 dB of stopband rejection from 20-20.5 GHz. – 1 st LO leakage into the signal path is most serious at 22 GHz, where the resulting spur is in the 2 nd IF passband. Almost 80 dB of filter rejection is needed at this frequency in the 1 st IF BPF. – 2 nd IF filter needs to have 57 dB stopband rejection below 550 MHz and above 1250 MHz, to avoid distortion from aliasing March 15-17, 2012EOVSA Preliminary Design Review7

8 Component Selection Criteria Flat frequency response, where possible Good VSWR, where possible, to limit mismatch loss and gain ripple Adequate P1dB in the amplifiers, to ensure good linearity High-intercept mixers not feasible, due to high cost of required LO drive power Mixer LO drive configuration in Downconverter is tied closely to design of LO Distribution module, to minimize total overall cost Common bias voltages (e.g., +12V), where possible Cost is critical: There are 30 of each Downconverter component types in the array, an expensive item can have a large impact in the overall budget. March 15-17, 2012EOVSA Preliminary Design Review8

9 Module / rack layout considerations High-frequency paths (RF, IF1, LO1, LO2) should be as short and direct as possible, to minimize losses and added reflections. Single component layer desired, for ease of assembly and service, and is space-efficient. Module depth limited to ~1.25” Vertically-oriented slide-in rack modules with spaces between, to allow air flow for cooling Assuming 19” rack width, two rows of 8 modules each, 5U or 6U high would probably work Use shielding and filtering on digital boards, shielded cables, to limit EMI March 15-17, 2012EOVSA Preliminary Design Review9

10 Downconverter Rack Modules Conceptual Layout March 15-17, 2012EOVSA Preliminary Design Review10

11 COTS module (Schroff 6U x 8HP) March 15-17, 2012EOVSA Preliminary Design Review11

12 Downconverter Assembly Interfaces Hardware: – (1) SC/APC SM fiber connector, signal input – (1) 2.92mm male coax adapter, 1 st LO (LO1) input – (1) SMA male coax adapter, 2 nd LO (LO2) input – (2) SMA male coax adapter, baseband IF outputs – (2) DB-9 or 10-pin RJ-style connectors, M&C I/O – (1) MIL-DTL-26482 connector, DC power input Software: – Refer to table in following slide March 15-17, 2012EOVSA Preliminary Design Review12

13 March 15-17, 2012EOVSA Preliminary Design Review13 Signal NameDir.TypeModeRange MinRange MaxUnitConnectorFreq/RatePrecision X / Y Pol from FEInRF on fiberAnalog Fiber-30-35dBmSC/APC1-18 GHzN/A 10 MHz RefInRF CWAnalog Elec(TBD)16dBmBNC10 MHzN/A 50 Hz SyncInPulseAnalog Elec05VBNC50 Hz1 us LO1 Sub A Mon/CtrlI/OSCPI DataDigital Elecn/a Ethernet50 Hz10 us LO1 Sub B Mon/CtrlI/OSCPI DataDigital Elecn/a Ethernet50 Hz10 us Subarray SettingInIntegerDigital Elec05VRS-485~1/day1 s LO2 PLO Lock Alrm MonOutBoolDigital Elecn/a RS-4851 Hz1 s RX PwrOut Mon X-PolOutFloatDigital Elec-35-15dBmRS-48550 Hz1 ms RX PwrOut Mon Y-PolOutFloatDigital Elec-35-15dBmRS-48550 Hz1 ms Atten Ctrl X-PolInIntegerDigital Elec015dBRS-4851 Hz10 us Atten Ctrl Y-PolInIntegerDigital Elec015dBRS-4851 Hz10 us X Pol from DCOutIF PowerAnalog Elec-5-2dBmSMA 650-1150 MHzN/A Y Pol from DCOutIF PowerAnalog Elec-5-2dBmSMA 650-1150 MHzN/A

14 Production Assembly, Testing Production process steps – Two-port VNA measurement of amplifiers, filters, digital attenuators, couplers, mixers (port-port isolation), and optical link sets – Mechanical assembly of Downconverter – Conversion loss measurement vs. frequency of Downconverter RF chain, w/o optical RX – Verification of M&C functionality – Documentation: Test results, configuration (s/n) list March 15-17, 2012EOVSA Preliminary Design Review14

15 Component Costing, Delivery All RF components except BPFs and 2 amplifiers have been specified, price/delivery quotes received Good estimates or preliminary pricing on most remaining electronic components Enclosure, connector and cable pricing are rough estimates, final TBD Gain equalizer spec is TBD: need to characterize actual component cascade before specifying and ordering Long lead times (over 12 weeks): – Optical links, in production quantity. Small quantity are available out of stock March 15-17, 2012EOVSA Preliminary Design Review15

16 March 15-17, 2012EOVSA Preliminary Design Review16

17 Important Schedule Dates for Downconverter Prototypes Have all RF components and COTS support electronics on order by end of April. Complete mechanical CAD models and fabrication drawings by May 1, send out for quotes, begin fab in mid-May May 1 – June 30: Design, PCB fab and component ordering for custom support electronic boards July 1 – July 15: Order the rack(s), cables, connectors, wire, remaining components for prototype unit construction and site installation July 1 – August 1: RF component characterization August – September: Assemble and test 3 prototypes October 1: Ship 3 prototypes to California for installation Downconverter embedded firmware and test software may need to be farmed out, in the interest of saving time. This could happen during July and August, in parallel with module assembly. March 15-17, 2012EOVSA Preliminary Design Review17


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