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TPAC: A 0.18 Micron MAPS for Digital Electromagnetic Calorimetry at the ILC J.A. Ballin b, R.E. Coath c *, J.P. Crooks c, P.D. Dauncey b, A.-M. Magnan.

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Presentation on theme: "TPAC: A 0.18 Micron MAPS for Digital Electromagnetic Calorimetry at the ILC J.A. Ballin b, R.E. Coath c *, J.P. Crooks c, P.D. Dauncey b, A.-M. Magnan."— Presentation transcript:

1 TPAC: A 0.18 Micron MAPS for Digital Electromagnetic Calorimetry at the ILC J.A. Ballin b, R.E. Coath c *, J.P. Crooks c, P.D. Dauncey b, A.-M. Magnan b, Y. Mikami a, O. Miller a, M. Noy b, V. Rajovic a, M. Stanitzki c, K.D. Stefanov c, R. Turchetta c, M. Tyndel c, E.G. Villani c, N.K. Watson a, J.A. Wilson a Electromagnetic Calorimetry at the ILC The International Linear Collider (ILC) is a proposed linear particle accelerator which will allow physicists to explore high energy regimes in detail and understand the fundamental components of the universe. In order to undertake such a physics programme, stringent requirements are placed on the calorimeter system in order to reach an energy resolution of 30%/E (GeV). The most promising approach to achieving this resolution is via the use of particle flow algorithms, which measure jet energies from both tracking and calorimeter information. This requires a highly granular readout for the electromagnetic calorimeter (ECAL). The baseline design for an ECAL consists of 30 tungsten layers. In between the tungsten layers is the silicon based sensor readout. The total silicon area will cover a region of approximately 1300 – 2000 m 2, depending on the detector radius. This is an order of magnitude larger than any previous silicon detector in high energy physics. The machine operation consists of a 1ms bunch train of events, followed by a 199ms idle time. We aim to prove Monolithic Active Pixel Sensors (MAPS) as both sensor and readout for such a calorimeter. The top half of this poster summarises the application and sensor presented at IEEE NSS 2007, while the lower half details some recent test results and future prospects. Pixel Array Performance The pixel array is evaluated by scanning the threshold setting and counting the number of hits recorded in the sensor. With no signal/stimulus this shows the electronic circuit noise; when a signal source is applied (laser, ionising radiation) the signal magnitude may be deduced from the maximum threshold that detects hits. Isolated N-well MAPS Process (INMAPS) The pixel architecture selected for this application requires in-pixel analog front-end circuits and control logic. Embedding such electronics in a MAPS pixel would originally have resulted in a significant degradation to the charge collection efficiency due to the presence of PMOS transistors in n-wells. These n-wells, in addition to the diodes, would collect charge carriers diffusing in the substrate (epitaxial layer), as shown below (left) and thus degrade the efficiency of the pixel. The deep p-well implant is a specially-developed processing step added to a standard commercial 0.18µm technology. We call this the INMAPS process. The high-energy implant creates a region of deep p-type doping which is selectively placed beneath PMOS transistors in the pixel. The resulting potential barrier in the substrate reflects diffusing charge carriers, and prevents them being collected by the n-wells of the electronics. The n-well diodes in the pixel are not protected by this deep p-well layer, and so may collect charge carriers. Device Simulation Tera-Pixel Active Calorimeter Sensor (TPAC) The TPAC1.0 sensor is a Monolithic Active Pixel Sensor (MAPS) that has been designed to meet the requirements of a digital ECAL at the ILC. The sensor comprises 28,224 pixels on a 50µm pitch that are sensitive to incident charged particles traversing the silicon. On detection of such an event, the sensor records the location and timestamp of the event in local memory for readout after the ILC bunch train. Two pixel architectures and two subtle variants of each were implemented to evaluate different designs. The preShape pixel design is summarised in the circuit block diagram and layout figures above: A charge preamplifier is connected to the four parallel collecting diodes, which can be seen in the pixel layout near the corners. The positioning of the diodes was optimised using device simulations to maximise charge collection in the pixel corners and minimise crosstalk between neighbouring pixels. The pixel circuits also implement a CR-RC shaper which generates a shaped signal pulse proportional to the input charge magnitude. A two-stage comparator is used to determine the hit criteria, with capability for per-pixel pedestal trim adjustment and masking. The pixel operates at 10µW during operation, but may be powered down between ILC bunch trains. Hit events generated in the pixels are stored in columns of logic with embedded SRAM which lay between banks of pixels. Future outlook: TPAC1.1 A new sensor, TPAC1.1 has been designed and is in the process of being manufactured. The new sensor selects a single pixel variant, and is thus an homogenous pixel array. The in-pixel trim adjustment was upgraded from 4 bits to 6 bits to ensure pixels can be aligned to a greater accuracy than the pixel noise. Test pixels of the preShape variant are included in TPAC1.1 in order to further learn more about the internal workings of these pixels. Beyond these and some minor changes, the sensor is very similar to TPAC1.0, and as such is I/O, PCB and DAQ compatible. This will enable efficient verification of the revised sensor with a known working test system. The homogenous pixel array make this sensor ideal for beam tests, which are anticipated in early 2009: Four sensors will be mounted in a stack, with a number of tungsten plates and scintillators to demonstrate the sensors in an ECAL environment with particle showers. Conclusions We have successfully designed, built and demonstrated operation of a highly complex pixelated sensor for an ECAL at the ILC. The pixels have been shown to respond to input stimuli from 55 Fe and an infrared laser, which studies have shown to correspond well with device simulations. We have successfully developed, implemented and verified a deep p-well implant on a standard 0.18µm CMOS process, to improve the charge collection efficiency of a MAPS detector with in-pixel electronics. The inclusion of such a layer is shown to be essential to the success of the design. A revised sensor is due back imminently from fabrication, where a single pixel architecture was selected from the characterisation work presented herein. Testing of this new sensor will begin immediately on its return, thanks to complete compatibility with existing test systems. The new sensor has an homogenous array of pixels, and so is well suited to the intended beam test in early 2009, where it is hoped to demonstrate ECAL operation in a real particle beam, using tungsten to generate showers in the 4 sensors. In the long term this collaboration hopes to build larger scale sensors from these pixels and their associated circuits to demonstrate digital calorimetry with a stack of multiple sensor layers in a particle beam environment. Pixel layout layers: n-well (pink), deep p-well (shaded). Profile for simulation & measurement results (below) marked with dotted line. Device simulations were used to predict the performance of a pixel with and without the deep p-well implant. A point charge is deposited at a number of positions along the line indicated, and the total charge collected by the four pixel diodes is simulated. Laser Test Results Sensors are stimulated with a pulsed 1064nm laser from the back (substrate) side. The laser is focussed to a 2µm spot size at the depth of the epitaxial layer through the bulk silicon, which is transparent at this IR wavelength. This method allows a point-like charge to be deposited in a pixel to cross-check with device simulations. The correlation between simulation and measured results is seen to be good, and clearly demonstrates how well the deep p-well performs. A test pixel is available with analogue outputs which has also been used to evaluate the behaviour of charge deposited in the substrate. The time delay from the laser fire strobe and the analogue pixel signal pulse is recorded for each laser position, and compared with simulation results (right). There is a fixed system delay from the laser fire strobe to light emission (included in plot), but the correlation between the simulated charge-collection time and the measured result is good. A per-pixel threshold scan with no stimulus reveals a spread of around 20 counts in the offset (pedestal) for the 7056 pixels of each preShape variant. This data is processed to generate per-pixel trim settings, which are pre-loaded into the pixel array. The histogram of per-pixel scans is shown in the subsequent plot, with the trims applied: The pixel spread had been reduced to 4 counts. Many pixels in turn are consistently stimulated with an IR laser, and the signal magnitude is recorded (by threshold scan) to plot gain uniformity. The resulting gain spread for two preShape pixel variants is ~12%, but one variant shows 40% higher relative gain. The two variants of the preShape pixel implemented two different capacitor configurations in the shaper feedback for optimised circuit gain according to two different circuit simulator tools. A strong 55 Fe source was used to calibrate the gain of the sensor electronics. The corresponding known maximum charge deposit of 1640e- is entirely collected when it hits a diode, generating a small peak in the threshold scan. Typical single-pixel results are shown (left) where a differential of the threshold scan clearly identifies the 55 Fe peak. Measurement and simulation results for charge deposited at equivalent points in a pixel Simulation and measured charge collection time for hits occurring between two pixel diodes. Simulation profiles B & C are close to pixel diodes Measurement profile passes directly through diodes Histograms of the mean value of per pixel noise without trim settings (above) and with in-pixel trim settings applied (below) Charge collection in a non-deep p-well processCharge collection in a deep p-well process preShape pixel circuit block diagram (left) and layout up to first metal layer (right): Dotted line shows the 50µm pixel boundary Single pixel result obtained with a 55 Fe source: Regular threshold scan is differentiated to clearly show the 55 Fe peak. preShape pixel gain uniformity in main array: two pixel variants are shown, quad0 (solid) and quad1 (dashed). Illustration showing a SiW ECAL structure in an ILC barrel concept Simulation of a 3-jet hadronic event in an ILC detector


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