1. Students:Alexander Kinko Roni Lavi Instructor:Inna Rivkin Duration:2 Semesters Midterm Presentation Part 1 - Spring 2008 Midterm Presentation Part 1 - Spring 2008

2. A little motivation… Digital Experiments Analog Experiments A/D – D/A M.S.S

3.  Main Goal  Project Overview  Project Implementation  Inputs  Outputs  Summary  Project Schedule Table of Contents

4. Giving the students in EE lab 1 a tool for a deeper understanding, designing and implementing of modern signal processing systems. Main Goal

5.  Designing and manufacture a new platform for real time M.S.S. experiment (Mixed Signal System), for audio signals.  The platform will be incorporated in the future set of experiments in E.E. Lab 1, Technion. Project Overview (Semester a)

6. Project Overview (Semester b)  Designing an algorithm that conducts signal processing in real time.  Designing an analog application (audio circuit) that combines M.S.S. processing.

7. Sample & Reconstruction System Analog Input Analog Output (Top Level) Project Implementation (Top Level)

8. (Block Level) Project Implementation (Block Level) DE2 ADDA Real Time System for Sampling & Reconstruction Matrix

9. Analog Input Circuit (Anti- aliasing Filter, Preamp) Analog Output Circuit (Smoothing Filter, Power amp) Analog Input (Block Level) Project Implementation (Block Level) Analog Signal Digital Signal Digital Signal Analog Signals Analog Outputs Sampling System (ADC) Digital Processing Unit Reconstruction System (Multiplying DAC) Ext. Clock Input (optional)

10. Inputs  Analog input signal Bipolar voltage range: ±1 Volt Input bandwidth: 20Hz – 20,000Hz Protection from input over voltage  External clock input (optional) Voltage range: Standard LVTTL signaling Up to 100KHz  DC voltage supply inputs Main DC power source (DE2):+5V, +3.3V External DC power (optional):+9V

11. Control Inputs The platform can function in several modes, that are controlled by mechanical switches located on the digital processing unit, featuring:controlled Mixed signal processing mode Self BIT mode Clock source (internal or external)

12. Outputs  4 Analog output signals: 2 outputs from parallel DACs:  Voltage range: ±1.4V biased around 2.5V  Maximum update rate: 2.304 MHz 2 outputs from serial DACs:  Voltage range: 0.2 – 4.753V  Maximum update rate: 25.6 KHz

13. Weekly Schedule  Week 0-1:Complete design schematic Pin to pin schematic in OrCAD Preparation for PCB design Ordering special parts  Week 2:Finish PCB design Checking of the Wire-Wrap prototype  Week 3:Testing of the Wire-Wrap prototype

14. Weekly Schedule (cont.)  Week 4:Final testing of the Wire-Wrap prototype Writing the midterm presentation  Week 5:Finish PCB design Checking the Wire-Wrap prototype  Week 6:Midterm presentation  Midterms . 

15. Down the road…  Week 7: Sending PCB for manufacturing   Week 8:Receiving PCB from Manufacturer  Staggered assembly of PCB prototype   Week 9:Checking PCB board  Staggered assembly of PCB prototype   Week 10:Final testing of the PCB prototype  Preliminary checks DE2 with ADDA 

16. Down the road… (cont.)  Week 11:Integration ADDA with audio circuit   Week 12:Writing VHDL for mixed signal processing   Week 13:Integration for the M.S.S. 

17. In The End…  Manufacture file (including BOM)  2 assembled circuits  A basic set of processing functions  Basic integration with audio in/out circuits

18. One picture is worth a thousand words DE2 20KHz Sin Signal A/D Wire-Wrap Prototype Parallel D/A_1 Parallel D/A_2 Buffer + L.P Matrix Scope L.P

19. Mode 1 – Self Test ADDA D/A Analog Mux Digital Wave Generation A/D Digital Comparison Display DE2 Analog Mux Analog Input control Analog Output Back

20. Mode 4 – Mixed Signal )עיבוד ספרתי(DE2 )עיבוד ספרתי( DE2 כניסה אנלוגית מיקרופון \ מחולל ADDA יציאות אנלוגיות אוזניה \ סקופ מטריצה ממשק ספרתי אות אנלוגי שעון OSC אות אנלוגי Input Stage Output Stage כניסה דיגיטאלית יציאה דיגיטאלית Back

21. Control options  Enable/disable global bus buffers  Power down ADC section  Power down DAC section  BIT/input SPDT switch control  Channel select (1 of 4 in BIT mode only) Back