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Petros OikonomakosMark Zwolinski Foundation of Combined Datapath and Controller Self-checking Design Electronics and Computer Science University of Southampton,

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Presentation on theme: "Petros OikonomakosMark Zwolinski Foundation of Combined Datapath and Controller Self-checking Design Electronics and Computer Science University of Southampton,"— Presentation transcript:

1 Petros OikonomakosMark Zwolinski Foundation of Combined Datapath and Controller Self-checking Design Electronics and Computer Science University of Southampton, UK Electronic Systems Design Group 9 th International On-Line Testing Symposium Kos Island, Greece, 7-9 July 2003

2 Outline Introduction Target Architecture Parity-based Techniques Intrinsically Secure States Recent Considerations Conclusion

3 Introduction Starting point : controller / datapath system, self- checking datapath [Oikonomakos et al, DATE 2003] Goal : controller self-checking, integration with previous work Requirements : technology independence, ease of automation (time to market), area efficiency, adherence to self-checking theory Complete, automatically produced, controller / datapath self-checking solution!!!

4 Target Architecture Controller / datapath architecture Possibly several communicating FSMs Previous work : self-checking at point A Self-checking at point B is essential!!!

5 Per process parity-based self-checking

6 Single parity-based self-checking

7 per process parity checking : ~(N S +5×n) gates single checker : ~N S gates N S : total number of states n : number of processes the higher the degree of parallelism, the more the hardware savings!!! Hardware Costs

8 Intrinsically Secure (I.S.) States

9 Exploiting I.S. States in a process basic scheme detects all single control signal faults possibly little hardware saving several multiple faults are also detected!!!

10 Per process I.S. states-based self-checking

11 Single I.S. states-based self-checking

12 First experimental results Qrs benchmark Target Technology Alcatel CMOS.35 VLSI

13 Recent considerations – ongoing work adherence to self-checking theory : the self-testing property implementing embedded parity checkers with error memorizing capability [Tarnick, VLSI Design 1998] within our system the 1-out-of-n checker of [Khakbaz, TCOMP 1982] combining 1-out-of-n checking with Intrinsically Secure States for hardware savings

14 Conclusion self-checking at the raw, one-hot control signals alternative controller self-checking schemes datapath self-checking resource reuse (Intrinsically Secure States) implementation within a synthesis system, providing full datapath and controller self-checking solutions ongoing experimentation


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