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SIGAda, Atlanta, nov’05 1/20 Scheduling and Memory requirements analysis with AADL F. Singhoff, J. Legrand, L. Nana, L. Marcé University of Brest, France.

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Presentation on theme: "SIGAda, Atlanta, nov’05 1/20 Scheduling and Memory requirements analysis with AADL F. Singhoff, J. Legrand, L. Nana, L. Marcé University of Brest, France."— Presentation transcript:

1 SIGAda, Atlanta, nov’05 1/20 Scheduling and Memory requirements analysis with AADL F. Singhoff, J. Legrand, L. Nana, L. Marcé University of Brest, France LISYC/EA 3883

2 SIGAda, Atlanta, nov'05 2/20 Introduction and motivations (1/2)  The Architecture Analysis & Design Language (AADL) : SAE standard published in november 2004 (AS 5506 document). Allows a high level specification of real time systems in order to perform analysis, source code/documentation generation, …  An AADL specification is  A set of components such as : Thread : flow of control that executes a program (eg. Ada Task). Data : any data structure in a program (eg. Ada tagged record). Processor : part of the execution environment.  Connections between components : model component relationships.  Component properties : component information/characteristic (behavior, Ada package file name, Ada task stack requirement, …)

3 SIGAda, Atlanta, nov'05 3/20 Introduction and motivations (2/2)  Existing AADL toolsets : OSATE, STOOD, TOPCASED, ADeS … but there is currently few open-source performance analysis tools.  Since 2002, at Brest, we’re investigating : How to extend real time system analysis methods to take distribution into account ? How to provide tools to help system designers to predict distributed real time system performances ? Cheddar, an Ada framework designed to real time applications performance analysis.  How Cheddar can be applied to AADL specifications ?

4 SIGAda, Atlanta, nov'05 4/20 Talk overview  Introduction and project motivations  Usual performance analysis methods  Cheddar : a performance analyzer framework  Examples of AADL analysis : AADL threads scheduling analysis AADL event data port memory analysis  Conclusion and ongoing works

5 SIGAda, Atlanta, nov'05 5/20  Periodic task model : a bound on execution time (capacity, Ci), a fixed delay between two wake-up times (period,Pi), a temporal constraint to meet (deadline, Di).  Choose a real time scheduling algorithms (eg. Rate Monotonic).  Perform simulation analysis : compute and analyze time lines  Perform Analytical/Feasibility test analysis : no scheduling required Usual performance analysis methods : real time scheduling (1/2)

6 SIGAda, Atlanta, nov'05 6/20 Usual performance analysis methods : queueing systems (2/2)  Queueing system Kendall's notation : X/Y/n. X : customer arrival rate (M,G,D). Y : service time rate (M,G,D). n : number of servers. Examples : M/M/1, M/D/1, M/G/1, …  Goal : From a given customer arrival/service time rate, compute analytical criteria such as customer waiting time and number of waiting customers in the queue. Queue Server Customer arrivals Outgoing customers

7 SIGAda, Atlanta, nov'05 7/20 Talk overview  Introduction and project motivations  Usual performance analysis methods  Cheddar : a performance analyzer framework  Examples of AADL analysis : AADL threads scheduling analysis AADL event data port memory analysis  Conclusion and ongoing works

8 SIGAda, Atlanta, nov'05 8/20 Cheddar : a performance analyzer framework  Cheddar provides Ada 95 packages implementing both: Analytical and simulation queueing systems tools (see proceedings of SIGAda 2005). Analytical and simulation real time scheduling analysis tools (see proceedings of SIGAda 2004).  Example of computed criteria : Processors/tasks : worst/best/average response time, number of context switches/preemptions, missed deadlines, processor utilization factor test,... Shared resources & buffers : worst/best/average shared resource blocking task, priority inversion, maximum/average message waiting time, maximum/average number of messages... …

9 SIGAda, Atlanta, nov'05 9/20 Cheddar and AADL  Cheddar was not originally designed to work with AADL. How such kind of tool may be applied to AADL ?  In the sequel, we consider the following examples : AADL threads scheduling analysis. Buffer/Memory requirements of AADL event data ports.

10 SIGAda, Atlanta, nov'05 10/20 Talk overview  Introduction and project motivations  Usual performance analysis methods  Cheddar : a performance analyzer framework  Examples of AADL analysis : AADL threads scheduling analysis AADL event data port memory analysis  Conclusion and ongoing works

11 SIGAda, Atlanta, nov'05 11/20 AADL threads scheduling analysis (1/3)  AADL includes most of the features used in the context of real time scheduling analysis.  Nevertheless, the following questions have to be investigated : Can we model any built-in Cheddar's schedulers or task models ? Are standard properties enough to perform analytical/feasibility tests on any resources ? How to express new schedulers or task models ? => we need some new AADL properties related to thread, data and processor

12 SIGAda, Atlanta, nov'05 12/20 AADL threads scheduling analysis (2/3)  Example : a set of periodic/aperiodic threads scheduled with POSIX1003.1b and Rate Monotonic schedulers. thread implementation T3 properties Dispatch_Protocol => Periodic; Compute_Execution_Time => 1 ms.. 2 ms; Deadline => 10 ms; Period => 10 ms; end T3; thread implementation fifo2 properties Dispatch_Protocol => Background; Compute_Execution_Time => 1 ms.. 3 ms; Cheddar_Properties::POSIX_Scheduling_Policy => SCHED_FIFO; Cheddar_Properties::Fixed_Priority => 5; Deadline => 100 ms; end fifo2; processor implementation cpu0 properties Scheduling_Protocol => RATE_MONOTONIC; Cheddar_Properties::Preemptive_Scheduler => true; Cheddar_Properties::Scheduler_Quantum => 0 ms; end cpu0; processor implementation cpu1 properties Scheduling_Protocol => POSIX_SCHEDULER; Cheddar_Properties::Preemptive_Scheduler => true; Cheddar_Properties::Scheduler_Quantum => 2 ms; end cpu1;

13 SIGAda, Atlanta, nov'05 13/20 AADL threads scheduling analysis (3/3) Compute simulation Analysis (eg. deadlines, response times)

14 SIGAda, Atlanta, nov'05 14/20 Talk overview  Introduction and project motivations  Usual performance analysis methods  Cheddar : a performance analyzer framework  Examples of AADL analysis : AADL threads scheduling analysis AADL event data port memory analysis  Conclusion and ongoing works

15 SIGAda, Atlanta, nov'05 15/20 Event data ports memory requirement analysis (1/4)  Event data ports are AADL features used for asynchronous message transmission between threads. Events/messages are queued.  Queueing systems may be able to predict event data port me mory requirement.... But we have to answer two questions : How to take into account AADL thread dispatching (eg. periodic) ? How to take into account AADL thread scheduling (eg. RM) ?  As for the other AADL features, Cheddar provides : Simulation tools. Feasibility tests (based on queueing systems, J. Legrand, F. Singhoff, L. Nana & L. Marcé 2004).

16 SIGAda, Atlanta, nov'05 16/20 Event data ports memory requirement analysis (2/4)  Queueing systems for AADL event data ports : Define a new customer arrival/service time rate : the P rate. Define new queueing systems based on the P rate. Define new feasibility tests.  Worst case analytical analysis based on P/P/1 : Consumer/Producer threads are periodic. Ex. Feasibility test : the maximum number of messages in an event data port shared by N periodic producers and 1 periodic consumer is : 2.N (harmonic AADL thread set) 2.N+1 (other cases)  Average case analytical analysis based on M/P/1 : See the SIGAda 2005 proceedings for the feasibility tests.

17 SIGAda, Atlanta, nov'05 17/20 Event data ports memory requirement analysis (3/4) processor implementation cpu_rm.i properties Scheduling_Protocol => Rate_Monotonic;... end cpu_rm.i; process implementation p0.i subcomponents Producer1 : thread Producer.i; Producer2 : thread Producer.i; Consumer1 : thread Consumer.i; connections event data port Producer1.Data_Source -> Consumer1.Data_Sink; event data port Producer2.Data_Source -> Consumer1.Data_Sink; end p0.i; thread Producer Features Data_Source : out event data port; end Producer; thread Consumer features Data_Sink : in event data port; end Consumer; thread implementation Producer.i properties Dispatch_Protocol=>Periodic;... end Producer.i; thread implementation Consumer.i properties Dispatch_Protocol=>Periodic;... end Consumer.i;  Example 2 : event data port connections

18 SIGAda, Atlanta, nov'05 18/20 Event data ports memory requirement analysis (4/4) Buffer simulation Analysis from simulation Analytical worst case queueing system analysis (based on P/P/1)

19 SIGAda, Atlanta, nov'05 19/20 Talk overview  Introduction and project motivations  Usual performance analysis methods  Cheddar : a performance analyzer framework  Examples of AADL analysis : AADL threads scheduling analysis AADL event data port memory analysis  Conclusion and ongoing works

20 SIGAda, Atlanta, nov'05 20/20 Conclusion and ongoing works  The Cheddar AADL performance analyzer : Provides performance analysis tools for different AADL features, based on real time scheduling and queueing systems analysis. This AADL analyzer is distributed since the end of october (http://beru.univ-brest.fr/~singhoff/cheddar)... but has to be tested !http://beru.univ-brest.fr/~singhoff/cheddar Implementation based on Ocarina (ENST’s AADL Ada 95 parser). Cheddar can be run as a Stood plug-in, the TNI-Europe CASE tool (Thanks to AADL !).  Ongoing works : Related to thread precedency relationships (AADL connections). Related to hierarchical schedulers (eg. ARINC 653 scheduler).

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