1. INDIAN PARTICIPATION @ FAIR Subhasis Chattopadhyay

2. SIS 100 Tm SIS 300 Tm Structure of Nuclei far from Stability cooled antiproton beam: Hadron Spectroscopy Compressed Baryonic Matter The future Facility for Antiproton an Ion Research (FAIR) Ion and Laser Induced Plasmas: High Energy Density in Matter low-energy antiproton beam: antihydrogen Primary beams: 10 12 /s 238 U 28+ 1-2 AGeV 4·10 13 /s Protons 90 GeV 10 10 /s U 35 AGeV (Ni 45 AGeV) Secondary beams: rare isotopes 1-2 AGeV antiprotons up to 30 GeV

3. The Story: Brainstorming meeting on Nuclear Physics in next 20 years (DST-DAE meet @Mumbai (7-8 April 2006) Committee for FAIR: S. Chattopadhyay, VECC (Coordinator) S. Bhattacharya, SINP D. Biswas, BARC L.M. Pant, BARC S. Mandal, DU R. Palit, TIFR

4. Guidelines: Contribution should make impact on overall physics Contribution should be on specific hardware HW should be built in the country Early contact should be made to the main experiment Collaboration is the key with large university participation Should have significant spin-off 1.Detailed e-mail discussion 2.Meeting at BARC/VECC 3.Co-ordinators for respective experiments 4.Report send on October’end-2006

6. At least 40 M Euro contribution

7. Official status DST-DAE co-ordination committee meet (july 07) V.S. Ramamurthy: Chairman, FAIR-India task force DST meeting took place on Dec 30 th 2007 ( Finance Secy cleared the project) VSR attended FAIR meet at GSI DST-DAE co-ordination committee meet could not be taken twice, next scheduled on 8 th March’08

8. Building the SuperConducting Magnets for SUPER-FRS And Building of proton LINAC components (Major contributions, in-kind)

9. BEAM CATCHERS To stop primary beam & other fragments BC1 BC2 BC3

10. Implementation Strategy of FAIR Project (Time ~ 4 yrs) Design at VECC Design verification at VECC and GSI Prototype built by VECC in INDIA Test run at GSI Formulation of final beam dump design Fabrication in INDIA Installation in Super FRS Beam Line at GSI

12. 4 dipole 4 quadrupoles 1 sextupole

13. Milestones: Mid of 2007: Magnetic design of dipole magnet Mid of 2008: Engineering design of dipole magnet End of 2009: Fabrication of full size dipole magnet Mid of 2011: Fabrication of additional 3 dipole magnets End of 2007: Magnetic design of quadrupole magnet End of 2008: Engineering design of quadrupole magnet Mid of 2010: Fabrication of full size quadrupole magnet End of 2011: Fabrication of additional 3 quadrupole magnets, one sextupole magnet

14. Other experiments: NUSTAR PANDA

15. CBM

16. Our Achievements So far (1988-2007)… (1)PMDs for WA93,WA98, STAR,ALICE, Muon chambers for ALICE (2)Development of advanced gaseous detector laboratory * Gaseous detector laboratory exist at VECC-SINP and other collaborating institutes (3) Development of advanced electronics laboratories (MANAS development, a highlight) (4) Development of large scale computing facilities (Grid computing) (5) Successful International and National Collabotation (VECC,SINP,PU,RU,JU,IOP,AMU,IIT-Bombay) (6) More than 40 PhD students Future based on this strong base of experience and expertise

17. Collaborators: VECC SINP IOP BARC Panjab U Rajasthan U AMU Calcutta Univ BHU Jammu Univ Guahati Univ Kashmir Univ IIT-KGP Bose-Inst, Kolkata … Three (Indian) collaboration meetings so far Last on 30-31 st July ’ 07 at VECC Discussed details of physics/HW/simulation Simulation is running at VECC and at other places One GEM-based chamber built and tested with source One Engineer visited GSI for electronics work INDIA-CBM COLLABORATION Simulate, design, build and operate a large part of CBM muon system

18. MuCh detector 2007 Fe Fe Fe Fe Fe 20 20 20 30 35 cm 102.5 cm0 cm 5 cm 260cm 1.Beam : 2015 2.Distance – 2.6 m 3.Chambers: high resolution gas detectors (entire Indian effort) Challenges: High Rate High density Large background Development of fast, highly granular muon detector for Compressed Baryonic Matter experiment @FAIR

19. Task NameInstitutes involved Status SimulationVECC, Calcutta University, Guahati Univ, BHU, BARC, Jammu Univ, Kashmir Univ Codes installed everywhere, some results produced Detector R&DVECC, SINP, BHU, Guahati Univ, CU Started at VECC, Universities need fund for lab setup ElectronicsVECC, BARC, CU, SINP, PU Started at VECC, CU discussion with GSI going on PhysicsSINP, VECC, CU, Bose Institute, IOP- Bhubaneswar, PU Theoreticians are involved in big way Working Groups and Status (July 2007)

20. Comparison of detectors.. MWPCGEMMicromegas Rate capability10^6Hz/mm^2>5x10^7Hz/mm^210^8Hz/mm^2 GainHigh 10^6low 10^3 (single) > 10^5 (multi GEM) High > 10^5 Gain stabilityDrops at 10^4Hz/mm^2 Stable over 5*10^5Hz/mm^2 Stable over 10^6Hz/mm^2 2D Readout ?Not reallyYes and flexibleYes, not flexible Position resolution> 200 µm (analog) 50 µm (analog)Good < 80 µm Time resolution~ 100 µs< 100 ns Magnetic Field effectHighLow CostExpensive, fragileCheap, robust Both GEM & MICROMEGAS are suitable for high rate applications

21. GEM (fast high resolution detector) stack under test Resistive chain biasing 6 mm holes in the plexiglass top cover for Source. Gas Inlet source GEM assembly housed in ~60 cm x ~30 cm box Gas: Ar/CO2-70/30 Source: Ru106(ß) mesh – a 5-10 micron thick nichrome wire Micron (30micron) level hole

22. Electronics (Plan to participate in design and development of fast electronics) One engineer visited GSI, started working on a FPGA-based readout board Discussion started on participation in design of n-XYTER chip (32MHz, 128 channels) Calcutta University wants to participate in a big way A. Roy and M. Dey will give details

23. 512 Channels FEE Board A Portion of Full Schematic Diagram

24. Development of ASIC for CBM readout chip. n-XYTER chip: (mixed mode) 128 channels 32 MHz rate (analog) Useful for all purpose applications GSI has assigned part of the design job to us Discussion started at CU and BARC design team

25. Thick GEM, (first attempt) 0.5mm thick double- sided copper clad FR4 material. hole size is 0.3mm and the pitch is 1.2mm. Made locally.

26. Near term PLAN : 0.5mm x 0.5 mm readout plane, to be readout by GASSIPLEX GASSIPLEX Board +DAQ ready Readout plane ready Next: with n-XYTER??

27. Next Steps.... ➢ to do a gain estimation with the double GEM....maybe implement a third GEM layer ➢ Operate with a segmented readout – PCB ready ➢ Do timing Study, and for that one may try to optimise or use the already optimized gas mixture for high rates ➢ Use THGEM, as it more robust ➢ Testing a MICROMEGAS foil. ➢ Build facility at BHU

28. Simulation Codes installed (Partha’s talk tomorrow) Immediate plan : Muon trigger study Magnetised Iron as absorber Optimisation of detector/absorber combination Radiation study with FLUKA

29. Plan (as put in DST-DAE proposal): Detector development and control: VECC, SINP, BHU, PU, JU Electronics: VECC, CU, BARC Simulation: VECC, GU, JU, BHU, PU, AMU Silicon layer : BARC