1. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-1 Lecture 4 Transistor as Switch Jan. 13 2003

2. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-2 Topics n Transistor structures. n Transistor as a switch

3. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-3 Transistor structure n-type transistor:

4. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-4 The Nobel Prize in Physics 1956 n William Bradford Shockley –Semiconductor Laboratory of Beckman Instruments, Inc. Mountain View, CA, USA n John Bardeen –University of Illinois Urbana, IL, USA n Walter Houser Brattain –Bell Telephone Laboratories Murray Hill, NJ, USA

5. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-5 N Transistor

6. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-6 P Transistor

7. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-7 Transistor n Digital: switch n Analog: many characteristics n Example: inverter –P transistor + N transistor == one inverter

8. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-8 Inverter a out +

9. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-9 Inverter layout (tubs not shown) a out + transistors GND VDD aout tub ties

10. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-10 Example 1 + b a out Write the truth Table of this circuit?

11. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-11 NAND layout + b a out b a VDD GND tub ties

12. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-12 Example 2 + b a out Write the truth Table of this circuit?

13. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-13 NOR gate + b a out

14. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-14 NOR layout b a out a b VDD GND tub ties

15. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-15 Difference of digital and analog n Digital: switch –High level n Analog: characteristics of transistor –Low level

16. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-16 Example 3 Transmission gate:

17. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-17 Lecture 5 Transistor Fabrication Process Jan. 15 2003

18. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-18 Topics n Transistor structure (switch) n Basic fabrication steps.

19. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-19 Transistor structure n-type transistor:

20. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-20 Fabrication services n Educational services: –U.S.: MOSIS –EC: EuroPractice –Taiwan: CIC –Japan: VDEC n Fab companies: mainly South Asia

21. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-21 Fabrication processes n IC built on silicon substrate: –some structures diffused into substrate; – other structures built on top of substrate. n Substrate regions are doped with n-type and p-type impurities. (n+ = heavily doped) n Wires made of polycrystalline silicon (poly), multiple layers of aluminum (metal). n Silicon dioxide (SiO 2 ) is insulator.

22. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-22 Simple cross section substrate n+ p+ substrate metal1 poly SiO 2 metal2 metal3 transistor via

23. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-23 What is n N and P n Substrate n Poly n Well (tub) n Metal n Via

24. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-24 Photolithography Mask patterns are put on wafer using photo- sensitive material:

25. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-25 Process steps First place tubs to provide properly-doped substrate for n-type, p-type transistors: p-tub substrate

26. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-26 Process steps, cont’d. Pattern polysilicon before diffusion regions: p-tub poly gate oxide

27. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-27 Process steps, cont’d Add diffusions, performing self-masking: p-tub poly n+ p+

28. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-28 Process steps, cont’d Start adding metal layers: p-tub poly n+ p+ metal 1 vias

29. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-29 Transistor structure n-type transistor:

30. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-30 Question n How many layers? n Aluminum or copper? n Technology is P-MOS or N-MOS? n What is the purpose of silicon?

31. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-31 A complete fabrication process

32. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-32 Transistor structure (cont’d) n-type transistor:

33. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-33 Questions (cont’d) n Order of Poly !!! –Self-aligned n What is the carrier for N-transistor and P- transistor? n Complete inverter ? –Need metals and vias

34. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-34 0.25 micron transistor (Bell Labs) poly silicide source/drain gate oxide

35. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-35 Review n N transistor n P transistor

36. Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-36 Examples n Switch n Fabrication process