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An introduction to Esterel and its compilation
Dumitru Potop, fresh PhD
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Outline (Long) Introduction Esterel Esterel translation schemes
Embedded systems, Reactive systems, Synchronous paradigm Esterel Syntax and intuitive semantics Esterel translation schemes Automata-based Circuit-based “Simulation”-based
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Embedded systems Airplanes, cars, phones, washing machines, video cameras contain computers! Complex, custom hardware/software architectures Specific problems in their development: Specification, due to interdisciplinarity Specific languages, methods Compilation Implementations must fit tight specifications Joint development of hardware and software Insuring correctness, fault tolerance, and robustness (expensive bugs)
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Reactive systems (Harel, 1987)
Emphasis on communication and control React to input events with appropriate output events, according to the state Examples: digital circuits, man-machine interfaces, communication protocols state … Inputs … Outputs
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Synchronous paradigm Cycle-based execution model, global clock
Perfect synchrony Causality Input event Output event computation memory
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Synchronous paradigm Synchrony = abstraction of the real world:
Natural in circuits Advantages: clear semantics, codesign, verification methods Problem: combining circuit semantics with a higher-level description style time Execution instants
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Synchronous languages
Esterel (Berry et al.), ECL Structural imperative (Ada-like) style Fit for control-dominated parts Lustre (Halbwachs et al.), Signal (LeGuernic et al) Dataflow networks Circuit-like, low-level Argos (Maranichi), SyncCharts (André) Visual Statecharts-like formalisms
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The Esterel language Structural imperative style Basic constructs
Intuitive, modular Basic constructs Classical control flow: p;q, p||q, loop p end Preemption:abort p when S, suspend p when S Exception handling: trap T in p end, exit T Division into instants: pause, await S Signals: signal S in p end, emit S, present S then p else q end
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The Esterel language Example 1: loop [ await A || await B ]; emit O;
halt every R
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The Esterel language Example 2: signal S in await I ; emit S ||
await S ; emit O end signal
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The Esterel language Constructive causality Correct causality cycles
Instantaneous reaction to signal absence (analysis of not yet executed code) causality cycle signal S,T in emit S; present T then present S else emit T end end; end break the cycle
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Old translation schemes
Automata translation Fast, large code 1 2 3 loop [ await A || await B ]; emit O; halt every R 4 switch(state){ case 0: state=1; break; case 1: if(!R)if(A)if(B) {O=1;state=4;} else state=2; else if(B)state=3;break; case 2: if(R)state=1; else if(B){O=1;state=4;} break; case 3: if(R)state=1; else if(A){O=1;state=4;} break; case 4: if(R)state=1;break; }
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Old translation schemes
Circuit translation Slow, small code R O loop [ await A || await B ]; emit O; halt every R boot B RESET = R & !BOOT A_TRIGGER = A_OUT & !RESET A_THEN = A_TRIGGER & A A_ELSE = A_TRIGGER & !A A_TERM = A_THEN | ! A_TRIGGER A_IN = BOOT | RESET | A_ELSE B_TRIGGER = B_OUT & !RESET B_THEN = B_TRIGGER & B B_ELSE = B_TRIGGER & !B B_TERM = B_THEN | ! B_TRIGGER B_IN = BOOT | RESET | B_ELSE ACTIVE = A_TRIGGER | B_TRIGGER O = A_TERM & B_TERM & ACTIVE
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Old translation schemes
Direct semantic simulation (Edwards, Bertin) Fast, small code through static scheduling Restrict the class of accepted programs Resume: if(R) goto Start ; else if (A_active | B_active) { if (A_active & A) { A_active=0 ; } if (B_active & B) { B_active=0 ; } if (!(A_active | B_active)) { emit O ; } goto Out; Start: A_active=1 ; B_active=1 ; Out: loop [ await A || await B ]; emit O; halt every R
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Old translation schemes
Semantically complete Efficient code Intermediate model Explicit FSM Circuits ? Expensive, slow General Cheap, fast General* Cheap, fast Only “acyclic” programs Compiling method Bisimulation (fc2tools) RTL optimizations (SIS) Classical control-flow optimizations Optimization Generated code (without optim.) Very large, Very fast Small Slow Very small Very fast Semantics (acyclic=?) Less powerful optim. Problems Do not scale up well *=sccausal or slow simulation
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What I wanted How Formalize the efficient approach
Generate efficient code for “good” programs Generate code for all programs Understand cyclicity at a higher level Inexpensive optimizations based on static analysis Formalize the efficient approach New intermediate format/model (GRC) Hierarchical state representation Control-flow graph No specific encoding How
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GRC format – a small example
1 boot: loop [ await A;emit B || await B ]; emit O; halt every R # 4 await A 3 || await B 2 5 # loop-every halt 6 enter 4 Empty boxes = program operations. Blue = state representation, encoding, and decoding Entered in order, exited in reverse order State representation = skeleton, flowgraph = muscles and nerves, influencing one another Flowgraph = unrolling of the Esterel source. Skeleton = static information repository. Boot = generated, technical detail exit 1 enter 2 enter 3 enter 5 [1] exit 2 Inactive[4] [2] R 4 exit 4 emit B K0[4] K0 exit 3 emit O enter 6 A K1[4] K1 Inactive[5] [3] 5 exit 5 K0[5] 2 B [6] K1[5]
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GRC format – utility Supports the full Esterel semantics
Analysis and optimization at GRC code level Supports optimized encoding and scheduling algorithms
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Conclusion A very brief introduction to Esterel, its compilation, and my work During my PhD: New Esterel semantics Intermediate model for Esterel programs Static analysis and optimization at this level General code generation scheme The best compiler yet
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Past Future PhD at Ecole des Mines de Paris, with Gérard Berry
Complete the work started during the PhD Investigate aspects related to code distribution (Benveniste et al.) Future
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Results Prototype compiler (acyclic case) Examples: Turbo channel bus
Berry’s wristwatch Video generator Shock absorber Operating system model Avionics fuel controller Avionics cockpit Man-machine interface Test configuration: PIII/1GHz/128M/Linux gcc –O, 1Mcycle random or given
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