Download presentation
Presentation is loading. Please wait.
Published byBritton Hill Modified over 9 years ago
1
LNL 1 SLOW CONTROLS FOR CMS DRIFT TUBE CHAMBERS M. Bellato, L. Castellani INFN Sezione di Padova
2
LNL 2 M. Bellato, L. Castellani INFN - Padova DT SLOW CONTROLS (DTSC)
3
LNL 3 M. Bellato, L. Castellani INFN - Padova DTSC COMPONENTS –1 CONTROL BOARD –Close to DTBX chambers –Housed in cooled minicrates –Microprocessor based –External world I/F via serial optical link(s)
4
LNL 4 M. Bellato, L. Castellani INFN - Padova DTSC COMPONENTS - 2 SERIAL LINKS –One direct link from each control board to counting room –One direct link from half wheel control board to counting room –One daisy chained link from sector collector to control boards (half wheel) –One local link for maintenance
5
LNL 5 M. Bellato, L. Castellani INFN - Padova DTSC COMPONENTS - 3 SLOW CONTROL MASTER –Sits in the counting room –250 RS232 optical connections –Houses the DCS interface
6
LNL 6 M. Bellato, L. Castellani INFN - Padova CONTROL BOARD FUNCTIONALITY
7
LNL 7 M. Bellato, L. Castellani INFN - Padova DTCCB - GOAL Clock distribution Test Pulse signals distribution Distribution and Readout of analog signals Distribution and Readout of control signals Temperature monitoring Trigger Board and Readout Board ASICs setup and housekeeping
8
LNL 8 M. Bellato, L. Castellani INFN - Padova DTCCB – CLOCK DISTRIBUTION 40 MHZ LHC clock(s) via a TTCrx chip Low skew ( < 1ns) clock tree network to Trigger Boards, Server Boards and Readout Boards Decoding of TTC signals
9
LNL 9 M. Bellato, L. Castellani INFN - Padova DTCCB – Test Pulse Signals Distribution Programmable test pulse generation during orbit gap via TTC TEST signal Only orthogonal tracks Programmable delay
10
LNL 10 M. Bellato, L. Castellani INFN - Padova DTCCB - Distribution and Readout of analog signals One 8 inputs ADC and one DAC Monitor of Power Supply lines for front-end boards Monitor of Power Supply lines for minicrate boards Readout of pressure values in the chamber Set of operational parameters in the front-end boards (threshold, bias,…) Readout of various temperatures in the chamber and in the minicrate
11
LNL 11 M. Bellato, L. Castellani INFN - Padova DTCCB – Distribution and Readout of control signals On/Off to different boards and to sections of the board itself 3 I2C ports for front-end boards, RPC and alignment system Voltage regulators FAULT signal detection Test pulse sequence control
12
LNL 12 M. Bellato, L. Castellani INFN - Padova DTCCB – ASICs Interface JTAG I/F for programming the Trigger Board and Readout Board Independent JTAG chains for the Trigger Board and Readout Board 4 bit addressable JTAG bus (max. 16 boards) Fast Parallel I/F for accessing Trigger Board (e.g. loading of lookup tables, etc..) –Shares the Trigger Data Path
13
LNL 13 DTCCB LAYOUT
14
LNL 14 COMMUNICATION CHANNELS Optical asynchronous RS232 channel to each control board Four-fibre cables connect two minicrates each Daisy-chained RS485 channel for each half wheel –RS485 -> RS232 conversion done on Sector Collector Control Board –Backup communication channel Local RS232 port for service and maintenance
15
LNL 15 M. Bellato, L. Castellani INFN - Padova SLOW CONTROL MASTER –1 250 asynchronous RS232 optical channels Software flow control Deep transmit and receive fifos –Increase latency –Decrease interrupt rate to crate controller DCS Interface
16
LNL 16 M. Bellato, L. Castellani INFN - Padova SLOW CONTROL MASTER –2 Choice of technology –CompactPCI One 6U crate with 21 slots or two 6U crates with 10 slots 16 boards with 16 ports each Optical connectors both on front and rear side Requires an intelligent controller –Might run a diskless OS (VxWorks, LynxOS,..) –Might run Win NT/2k with DCS stuff Might be operated with an MXI controller from a PC
17
LNL 17 M. Bellato, L. Castellani INFN - Padova SOFTWARE Needed : Firmware for Control Board –Only a very preliminary version exists –A basic version under development at CIEMAT Software driver for RS232 Uarts on the Slow Control Master Bridge for communicating with SCADA control systems DCS Interface
18
LNL 18 M. Bellato, L. Castellani INFN - Padova STATUS Control board –Few prototypes working –Final version expected in Q2 2002 (TTCrx delay) Serial connections –Choice of optical transceivers done –600 pieces procured (Q4 2001) Slow Control Master –Choice of technology done –First board prototype being assembled now Software –Very preliminary version of CCB firmware existing –UART driver not existing –SCADA bridge available from DCS people –DCS interface not existing
Similar presentations
© 2024 SlidePlayer.com. Inc.
All rights reserved.