1. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 1 - DAAD Experimental verification of single-phase PLL with novel two-phase generator for grid-connected converters Slobodan Lubura, Milomir Šoja, Srđan Lale, Marko Ikić The Faculty of Electrical Engineering, University East Sarajevo, East Sarajevo, Bosnia and Herzegovina

2. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 2 - DAAD Introduction The general structure of single-phase PLL based on SRF theory

3. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 3 - DAAD Novel two-phase generator with noise and DC offset rejection The new two-phase generator with DC offset rejection realized in Simulink environment

4. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 4 - DAAD Novel two-phase generator with noise and DC offset rejection Proposed structure of novel two-phase generator can be presented with following transfer functions: Both (1) and (2) represent transfer functions of band-pass filters.

5. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 5 - DAAD Experimental results of proposed PLL Block-diagram of proposed PLL topology realized in Simulink using Real Time Windows Target library

6. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 6 - DAAD Experimental results of proposed PLL – continuous model of PLL The response of two-phase generator on grid voltage with noise

7. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 7 - DAAD Experimental results of proposed PLL – continuous model of PLL a)Input grid voltage with 30% DC offset and estimated grid amplitude, without control loop for DC offset rejection b)Input grid voltage with 30% DC offset and estimated grid frequency, without control loop for DC offset rejection a)b)

8. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 8 - DAAD Experimental results of proposed PLL – continuous model of PLL a)Input grid voltage with 30% DC offset and estimated grid amplitude, with control loop for DC offset rejection b)Input grid voltage with 30% DC offset and estimated grid frequency, with control loop for DC offset rejection a)b)

9. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 9 - DAAD Experimental results of proposed PLL – continuous model of PLL Estimated grid frequency (top) and amplitude (bottom) for k i = 10, 100 and 500 (robustness against step changes of grid frequency and amplitude)

10. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 10 - DAAD Experimental results of proposed PLL – continuous model of PLL Input grid voltage with 30% DC offset and generated reference voltage.

11. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 11 - DAAD Experimental results of proposed PLL – discrete model of PLL Discretization of proposed PLL was performed in two ways: Tustin approximation Schneider approximation

12. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 12 - DAAD Experimental results of proposed PLL – discrete model of PLL Estimated grid amplitude for two discrete models of PLL (step changes of grid parameters) T s =50μs

13. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 13 - DAAD Experimental results of proposed PLL – discrete model of PLL Estimated grid frequency for two discrete models of PLL (step changes of grid parameters) T s =50μs

14. Projekt „ESSNBS“ Niš, November 4 th – 7 th, 2012 - 14 - DAAD Conclusion The results show that proposed PLL (both continual and discrete) can solve important issues of presence of DC offset and noise in measured values of grid voltage. Proposed PLL can be used for both, grid-connected systems (e.g. Photovoltaic and Wind turbines) and power condition equipment (uninterruptible power supply (UPS), active filters) which rely on PLL based synchronization. The further work should be implementation of proposed PLL topology on digital platform (using dsPIC).