1. CONTROL UNIT OPERATION MICROPROGRAMMED CONTROL

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3. 3 Control Unit Memory ALU InputOutput Data Transfer Process Input Output

4.  Control Unit characterization:  Define the basic elements of the processor  describe the micro-operations that the processor performs  Determine the functions that the control unit must perform to cause the micro-operations to be performed.  Types of micro-operations:  Transfer data between registers  Transfer data from register to external  Transfer data from external to register  Perform arithmetic or logical ops

5.  Sequencing  The CU causes the CPU to step through a series of micro-operations in the proper sequence, based on the program being executed.  Execution  The CU causes each micro-operation to be performed.  This is done using Control Signals

7.  The inputs  Clock – this is how the control unit “keeps time”  Instruction register – the opcode of the current instruction is used to determine which micro-operations to perform during the execution cycle.  Flags – These are needed by the control unit to determine the status of the processor and the outcome of the previous ALU operations.  Control signals from control bus – the control bus portion of the system bus provides signals to the control unit.  The outputs:  Control signals within the processor – those that cause data to be moved from one register to another, and those that activate specific ALU functions.  Control signals to control bus – control signals to memory, control signals to I/O modules

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9.  Hardwired  Sequential circuits  Generating fixed sequence of control signals  Implemented using standard digital logic design  Pro: fast and small (total number of components)  Con: changes of CU is difficult, requires a new implementation  Used in RISC system  Microprogramming  The values of the control signal for each task are stored in a control memory  Control memory is accessed sequentially  Advantages: systematic, easy for modification  Disadvantages: required more components, slow 9

10.  In addition to the use of control signals, each microoperation is described in symbolic notation, a language known as micropgramming language.  Each line describes a set of micro-operations occuring at one time and is known as a microinstructions.  A sequence of instructions is known as a microprogram, or firmware.  Midway between hardware and software.  Microinstructions could be arranged in a control memory.

11.  Defines the sequence of micro-operations to be performed during each cycle, and it specifies the sequencing of these cycles.  Each routine ends with a branch or jump instruction indicating where to go next.  Has a wide word width  due to the large number of control points to be manipulated 11

12. 12  Control memory contains a program that describes the behavior of the CU.  The set of microinstructions is stored in the control memory.  The control address register contains the address of the next microinstruction to be read.  When a microinstruction is read from the control memory, it is transferred to a control buffer register.  A sequencing unit loads the control address register and issues a read command.

13.  Sequence logic unit issues read command.  Word specified in control address register is read into control buffer register.  Control buffer register contents generates control signals and next address information.  Sequence logic loads new address into control buffer register based on next address information from control buffer register and ALU flags. 13

14.  Depending on ALU flags and control buffer register  Get next instruction  Add 1 to control address register  Jump to new routine based on jump microinstruction  Load address field of control buffer register into control address register  Jump to machine instruction routine  Load control address register based on opcode in IR 14

15.  Are more systematic with a well defined format.  Can be easily modified during the design process.  Require more components to implement.  However, tend to be slower than hardwired units (due to having to perform memory read operations)

16. Transformation of opcode to microinstruction 16 opcodeoperand Fetch cycle routine Indirect cycle routine Addition routine Subtraction routine instruction Control Memory

17. Method 1: Direct Mapping An instruction has 4 bit opcode and a control memory of the size 128 words. Each opcode has its own microprogram routine. 17 1011operand 0 1011 00 0 xxxx 00 Instruction Mapping bit Starting address of microroutine Control address register

18. 18 OP-codes of Instructions ADD AND LDA STA BUN 0000 0001 0010 0011 0100 Direct Mapping Address 10 0000 010 10 0001 010 10 0010 010 10 0011 010 10 0100 010 Mapping Bits 10 xxxx 010 ADD Routine AND Routine SUB Routine MOV Routine JMP Routine

19. Method 2: Using ROM to mapping function 19 1011operand ROM Control address register

20. 20 Microinstruction Format EA is the effective address Symbol OP-code Description ADD 0000AC   AC + M[EA] BRANCH 0001 if (AC < 0) then (PC   EA) STORE 0010M[EA]   AC EXCHANGE 0011AC   M[EA], M[EA]   AC Machine instruction format I Opcode 15141110 Address 0 Sample machine instructions F1F2F3CDBRAD 333227 F1, F2, F3: Microoperation fields CD: Condition for branching BR: Branch field AD: Address field

21. 21 F1MicrooperationSymbol 000NoneNOP 001AC  AC + DRADD 010AC  0CLRAC 011AC  AC + 1INCAC 100AC  DRDRTAC 101AR  DR(0-10)DRTAR 110AR  PCPCTAR 111M[AR]  DRWRITE F3MicrooperationSymbol 000NoneNOP 001AC  AC  DRXOR 010AC  AC’COM 011AC  shl ACSHL 100AC  shr ACSHR 101PC  PC + 1INCPC 110PC  ARARTPC 111Reserved F2MicrooperationSymbol 000NoneNOP 001AC  AC - DRSUB 010AC  AC  DROR 011AC  AC  DRAND 100DR  M[AR]READ 101DR  ACACTDR 110DR  DR + 1INCDR 111DR(0-10)  PCPCTDR

22. 22 CDCondition Symbol Comments 00Always = 1UUnconditional branch 01DR(15) IIndirect address bit 10AC(15)SSign bit of AC 11AC = 0ZZero value in AC BR Symbol Function 00 JMP CAR  AD if condition = 1 CAR  CAR + 1 if condition = 0 01 CALL CAR  AD, SBR  CAR + 1 if condition = 1 CAR  CAR + 1 if condition = 0 10 RET CAR  SBR (Return from subroutine) 11 MAP CAR(2-5)  DR(11-14), CAR(0,1,6)  0

23. 23 Address Binary Microinstruction Micro Routine Decimal Binary F1 F2 F3 CD BR AD ADD0 0000000000000 000 01 01 1000011 1 0000001 000 100 000 00 00 0000010 2 0000010 001 000 000 00 00 1000000 3 0000011 000 000 000 00 00 1000000 BRANCH 4 0000100 000 000 000 10 00 0000110 5 0000101 000 000 000 00 00 1000000 6 0000110 000 000 000 01 01 1000011 7 0000111 000 000 110 00 00 1000000 STORE 8 0001000 000 000 000 01 01 1000011 9 0001001 000 101 000 00 00 0001010 10 0001010 111 000 000 00 00 1000000 11 0001011 000 000 000 00 00 1000000 EXCHANGE 12 0001100 000 000 000 01 01 1000011 13 0001101 001 000 000 00 00 0001110 14 0001110 100 101 000 00 00 0001111 15 0001111 111 000 000 00 00 1000000 FETCH 64 1000000 110 000 000 00 00 1000001 65 1000001 000 100 101 00 00 1000010 66 1000010 101 000 000 00 11 0000000 INDRCT 67 1000011 000 100 000 00 00 1000100 68 1000100 101 000 000 00 10 0000000

24.  A system uses a control memory of 1024 words of 32 bits each. The microinstruction has three fields and a 16-bit microoperations. a.How many bits are there in the branch address field and the selection field? b.If there are 16 status bits in the system, how many bits of the branch logic are used to select a status bit? c.How many bits are left to select an input for the multiplexers? 24

25. a.Control memory has 1024 words (2 10 ). Therefore required 10-bit address for each word ie address field = 10 bits Select field = 32 – (16 + 10) = 6 bits. b.16 (2 4 ) status bit therefore required 4 bits for the branch logic. c.Number of bits for multiplexer = 6 – 4 = 2 bits. 25 selectaddressmicrooperations Microinstruction: 32 bit 16 bit