1. 1 EE121 John Wakerly Lecture #6 Three-state Outputs Encoders Multiplexers XOR gates

2. 2 Three-state buffers Output = LOW, HIGH, or Hi-Z. Can tie multiple outputs together, if at most one at a time is driven.

3. 3 Different flavors

4. 4

5. 5 Timing considerations

6. 6 Three-state drivers

7. 7 Driver application

8. 8 Three-state transceiver

9. 9 Transceiver application

10. 10 Three-state enables in ABEL

11. 11 Encoders vs. Decoders DecoderEncoder

12. 12 Binary encoders

13. 13 Need priority in most applications

14. 14 8-input priority encoder

15. 15 Priority-encoder logic equations

16. 16 74x148 8-input priority encoder –Active-low I/O –Enable Input –“Got Something” –Enable Output

17. 17 74x148 circuit

18. 18 74x148 Truth Table

19. 19 Cascading priority encoders 32-input priority encoder

20. 20 15-input priority encoder in ABEL Declarations

21. 21 Constant expressions

22. 22 Outputs

23. 23 Alternative formulation WHEN is very natural for priority function

24. 24 Multiplexers

25. 25 74x151 8-input multiplexer

26. 26 74x151 truth table

27. 27 CMOS transmission gates 2-input multiplexer

28. 28 Other multiplexer varieties 2-input, 4-bit-wide –74x157 4-input, 2-bit-wide –74x153

29. 29 ABEL code for 74x153-like mux

30. 30 Easier ABEL multiplexer code

31. 31 Barrel shifter design example n data inputs, n data outputs Control inputs specify number of positions to rotate or shift data inputs Example: n = 16 –DIN[15:0], DOUT[15:0], S[3:0] (shift amount) Many possible solutions, all based on multiplexers

32. 32 16 16-to-1 muxes 16-to-1 mux = 2 x 74x151 8-to-1 mux + NAND gate

33. 33 4 16-bit 2-to-1 muxes 16-bit 2-to-1 mux = 4 x 74x157 4-bit 2-to-1 mux

34. 34 Properties of different approaches

35. 35 ABEL code for barrel shifter 20 inputs 16 outputs 16 product terms per output

36. 36 2-input XOR gates Like an OR gate, but excludes the case where both inputs are 1. XNOR: complement of XOR

37. 37 XOR and XNOR symbols

38. 38 Gate-level XOR circuits No direct realization with just a few transistors.

39. 39 CMOS XOR with transmission gates IF B==1 THEN Z = !A; ELSE Z = A;

40. 40 Multi-input XOR Sum modulo 2 Parity computation Used to generate and check parity bits in computer systems. –Detects any single-bit error

41. 41 Parity tree Faster with balanced tree structure

42. 42 Next time Comparators Adders Multipliers Read-only memories (ROMs)