1. Computer Architecture Lecture 2 Combinational Circuits Ralph Grishman September 2015 NYU

2. Time and Frequency time = 1 / frequency frequency = 1 / time units of time millisecond = 10 -3 second microsecond = 10 -6 second nanosecond = 10 -9 second picosecond = 10 -12 second units of frequency kiloHertz (kHz) = 10 3 cycles / second megaHertz (MHz) = 10 6 cycles / second gigaHertz (GHz) = 10 9 cycles / second 9/9/15Computer Architecture lecture 22

3. Today’s Problem The CDC 6600 delivered in 1965 had a 100 ns cycle time. What was its clock frequency? (a) 10 kHz (b) 100 kHz (c) 10 MHz (d) 100 MHz 9/9/15Computer Architecture lecture 23

4. Solution Time = 100 ns = 100 * 10 -9 sec = 10 2 * 10 -9 sec = 10 -7 sec Frequency = 10 7 Hz = 10 * 10 6 Hz = 10 MHz 9/9/15Computer Architecture lecture 24

5. Exclusive-or with Relays ? 9/9/15Computer Architecture lecture 25

6. Exclusive OR output inputA inputB

7. Combinational Circuits also called “combinatorial circuits” output only a function of current inputs no memory gates: simplest combinational circuits AND, OR, NOT, … can be easily built from switches 9/9/15Computer Architecture lecture 27

8. Representations of Combinational Circuits Truth table Boolean formula D = A ^ B (also, A  B) D = A v B (also, A + B) D = A Logic diagram 9/9/15Computer Architecture lecture 28 ABA ^ BA v B 0000 0101 1001 1111

9. Logic Diagram AND gate OR gate NOT gate (inverter) 9/9/15Computer Architecture lecture 29

10. Examples of Combinational Circuits NAND and NOR exclusive-OR (half-adder) multiplexer decoder full adder 9/9/15Computer Architecture lecture 210

11. Multiplexer 2-way multiplexer 9/9/15Computer Architecture lecture 211 1 0 A S B F

12. Multiplexer conceptually, selects one of the data inputs (A or B) and sends it to the output F: informally, if S == 0 then F = A else F = B F = S  A + S  B 9/9/15Computer Architecture lecture 212 1 0 A S B F

13. Multiplexer 4-way multiplexer uses a 2-bit select line to select one of 4 data inputs 9/9/15Computer Architecture lecture 213 11 00 S

14. Canonical forms Sum of products representation: – each term is a product which includes, for each input x i, either x i or x i – for example, with inputs A, B, and C, 9/9/15Computer Architecture lecture 214 F = A  B  C + A  B  C

15. Systematically converting truth table to a sum- of-products formula: for each row of truth table, construct a term which is 1 for the inputs in that row and 0 for all other rows – for example, for the row A B C = 0 0 1, the term is A  B  C keep those terms for which the output should be 1 OR together these terms 9/9/15Computer Architecture lecture 215

16. ABCF 0000 0011 0101 0110 1001 1010 1100 1111 9/9/15Computer Architecture lecture 216

17. ABCF 0000 0011 0101 0110 1001 1010 1100 1111 9/9/15Computer Architecture lecture 217 A  B  C

18. ABCF 0000 0011 0101 0110 1001 1010 1100 1111 9/9/15Computer Architecture lecture 218 A  B  C

19. ABCF 0000 0011 0101 0110 1001 1010 1100 1111 9/9/15Computer Architecture lecture 219 A  B  C F = A  B  C + A  B  C

20. Universality So we can convert any truth table to a Boolean formula or a logic circuit consisting of AND, OR, and NOT gates A truth table can represent an arbitrary combinational function So an arbitrary function can be constructed from AND, OR, and NOT gates 9/9/15Computer Architecture lecture 220

21. DeMorgan’s Theorem X + Y = X  Y allows construction of OR from AND and NOT, or AND from OR and NOT so one can build any circuit using just two types of gates can we manage with just one type of gate? homework #1 9/9/15Computer Architecture lecture 221