1. Instructor: Yuzhuang Hu yhu1@cs.sfu.ca

2. State-Machine Diagrams contd. (Chapter 5, Section 5-7) Use boolean expressions to simplify the diagram. S0S0 S1S1 S2S2 S3S3 Reset AB A (A+B)/Z A B/Y Z A B Y,Z A B/Y (A+B)/Y Inputs: A, B Outputs: Y, Z Defaults: Y=0,Z=0

3. Input Conditions in State-Machine Diagrams Input condition: boolean expression or equation in terms of input variables.  Transition condition (TC): an input condition on a transition arc, and causes a state transition to occur.  Unconditional transition: always occurs on the next clock. It can be thought of as having an implicit transition condition equal to 1.

4. Output Conditions in State- Machine Diagrams Output condition (OC): an input condition that, if equal to 1, causes an output action to occur.  Moore output actions: unconditional for each state.  Transition-condition independent (TCI) Mealy output actions: depend on only states.  Transition-condition dependent (TCD) Mealy output actions: depend on both the state and a transition condition.  Transition and output condition dependent (TOCD) output actions: depend on the state, a transition condition, and an output condition. There is a slash between such an output action with its associated output condition.

5. Constraints on Input Conditions The transition conditions from a given state S i must be mutually exclusive. An invalid example: The transition conditions from a given state must cover all possible combinations of input values. S Y,Z AB B A Inputs: A, B Outputs: Y, Z Defaults: Y=0,Z=0

6. Constraints on Output Conditions For every output action in state S i or on its transitions having coincident output variables with differing values, the corresponding pair of output conditions must be mutually exclusive. An invalid example: For every output variable, the output conditions for state S i or its transitions must cover all possible combinations of input values that can occur. S Y,Z AB A Inputs: A, B Outputs: Y, Z Defaults: Y=0,Z=0 Z

7. State-Machine Design of a Sliding Door Control

8. Sliding Door Control contd. What states should we consider?

9. State-Machine Diagram for the Automatic Sliding Door Defaults: BT=0, CD=0, OD=0 Closed Open Opened Close LK, PA·PP·MO LK·CL/CD BT PA·PP·MO PA+PP+MO+DR CD CL·PA·PP·MO·DR PA+PP+MO OL/OD OL OD OL Reset LK· (PA+PP+MO)

10. Modified State Table for the Automatic Sliding Door

11. State Equations for the Automatic Sliding Door PA + PP + MO appears frequently as factors in other transition conditions. X = PA+PP+MO Y 1 (t+1)=Y 1 ·Y 2 ·OL+Y 1 · Y 2 +Y 1 ·Y 2 ·CL ·X·DR Y 2 (t+1)=Y 1 ·Y 2 ·LK·X+Y 1 · Y 2 +Y 1 ·Y 2 ·X+Y 1 ·Y 2 ·(X+DR)

12. Registers and Register Transfers (Chapter 7) A register consists of a set of flip-flops, together with gates that implement their state transitions. A counter is a register that goes through a predetermined sequence of states upon the application of clock pulses.

13. The Simplest Register Consists of only flip-flops without external gates. D >C R D R Q0Q0 Q1Q1 D0D0 D1D1 Clock Clear

14. Register with Parallel Load Connect Load to C-input or D-input? Be careful of the clock skew. D >C R D R Q0Q0 Q1Q1 D0D0 D1D1 Clock Clear Load Clock C inputs

15. Register with Parallel Load contd. Direct Load through gates into the D inputs. D EN D >C Q0Q0 Q1Q1 D0D0 D1D1 Load Clock >C D Clock Q END >C

16. Digital System Design In most digital system designs, we partition the system into two types of modules: a datapath, and a control unit. Control Unit Data Path Control inputs Data outputs Control outputs Data inputs Control Signals Status Signals

17. Register Transfer Operations The registers are assumed to be basic components of the digital system. The movement of the data stored in registers and the processing performed on the data are referred to as register transfer operations. They are specified by the following three basic components.  The set of registers in the system.  The operations that are performed on the data stored in the registers, and  The control that supervises the sequence of operations in the system.

18. Register Transfer Operations contd. Representations of Registers: R (a) Register R 7 6 5 4 3 2 1 0 (b) Bits of a register R2 (c) A 16-bit Register PC(H) PC(L) (b) Bits of a register 150 8 7 0

19. Basic Symbols for Register Transfers

20. An Register Transfer Example Transfer from R1 to R2 when K1 = 1. R1R2 Load Clock K1 n

21. Microoperations Transfer microoperations, which transfer binary data from one register to another. Arithmetic microoperations, which perform arithmetic on data in registers. Logic microoperations, which perform bit manipulation on data in registers. Shift microoperations, which shift data in registers.

22. Shift Registers A register capable of shifting its stored bits laterally in one or both directions is called a shift register. D >C D D D Serial input SI Serial output SO Clock

23. Ripple Counter The flip-flop is positive edge triggered. D >C R D R D R D R D R D R D R D R Clock Reset

24. Multiplexer and Bus-based Transfers for Multiple Registers R0 R1 R2 3-to-1 MUX select bus 2 R0 R1 R2 EN Enable Multiplexer BusThree-state Bus

25. Control of Register Transfers Programmable system: a portion of the input to the processor consists of a sequence of instructions. Each instruction specifies the operation that the system is to perform, which operands to use, where to place the results of the operation, and in some cases, which instruction to execute next. Non-programmable system: the control unit determines the operations to be performed and the sequence of those operations, based on its inputs and the status bits from the datapath.

26. Register-Transfer System Design Procedure Write a detailed system specification. Define all external data and control input signals, all external data, control and status output signals, and the registers of the datapath and control unit. Find a state machine diagram for the system including the register transfers in the datapath and in the control unit.

27. Register-Transfer System Design Procedure contd. Define internal control and status signals. Draw a block diagram of the datapath, and a block diagram of the control unit if it includes register transfer hardware. Design any specialized register transfer logic in both the control and datapath. Design the control unit logic. Verify the design.

28. An Example: DashWatch The DashWatch is a very inexpensive stopwatch. It has a 4- digit BCD counter called TM, and a 16-bit parallel load register SD. START STOP CSS RESET Display Time

29. Inputs, Outputs, and Registers of the DashWatch

30. State-Machine Diagram for the DashWatch S1 S2 S3 S4 S5 S7S6 SD<-(9999) BCD TM<-(0000) BCD TM<-(TM+1) BCD, DIS=TM DIS=TM SD<-TM RESET START STOP CSS·START START STOP CSS TM<SD TM>=SD START CSS·START START DIS=SD

31. Datapath Output Actions and Status Generation

32. Datapath Block Diagram SRST TM A<B Comparator A<B Comparator Storage Register LOAD RESET D1D0 16-Bit 2-to-1 MUX DP 4-Digit LCD Display Segment Converter 4-Digit BCD-to-7 D1D0 16-Bit 2-to-1 MUX ENTM RSTM ALTB LSR RESET UPDATE SD S DS 1 1001100110011001 DIS 4-Digit BCD Counter C0 D

33. Control State-Machine Diagram S1 S2 S3 S4 S5 S7S6 LSR RSTM ENTM UPDATE, LSR RESET START STOP CSS·START START STOP CSS ALTB START CSS·START START DS Defaults: All outputs = 0

34. Thanks!