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1 Nanoelectronic Memory Devices: Space-Time-Energy Trade-offs Ralph Cavin and Victor Zhirnov Semiconductor Research Corporation
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2 Main Points Many candidates for beyond-CMOS nano-electronics have been proposed for memory, but no clear successor has been identified. Methodology for system-level analysis How is maximum performance related to device physics? SRC/NSF A*STAR Forum on 2020 Semiconductor Memory Strategies: Processes, Devices, and Architectures, Singapore, October 20-21, 2009 http://grc.src.org/member/event/e003676/e003676_MeetingResults.asp
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Space-Time-Energy Metrics Essential parameters of the memory element are: cell size/density, retention time, access time/speed operating voltage/energy. None of known memory technologies, perform well across all of these parameters At the most basic level, for all memory elements, there is interdependence between operational voltage, the speed of operation and the retention time. Cell dimensions are also part of the trade-off, hence the Space-Time-Energy compromise 3
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Space-Action Principle for Memory 4 The Least Action principle is a fundamental principle in Physics Plank’s constant h=6.62x10 -34 Js ( h)
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Three essential components of a Memory Device: 1) ‘Storage node’ physics of memory operation 2) ‘Sensor’ which reads the state e.g. transistor 3) ‘Selector’ which allows a memory cell in an array to be addressed transistor diode All three components impact scaling limits for all memory devices 5
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Three Major Memory State Variables Electron Charge (‘moving electrons’) e.g. DRAM, Flash Electron Spin (‘moving spins’) (STT-) MRAM Massive particle(s) (‘moving atoms’) e.g. ReRAM, PCM, Nanomechanical, etc. 6 Note: Electrical I/O always wanted
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DRAM schematic 7 Storage: N carriers Barrier+Selector E b, eVMax. retention 0.61 ms 0.654 ms 0.7584ms 1.1~1 h 1.6>10 years Problem 1: In Si devices E bmax <E g =1.1 eV Only volatile memory possible with FET barrier
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Volatile electron-based memory: DRAM 8 E b,tr E b,C dCdC a Selector Sensor Storage Node 25fF Problem 2a: External sensing requires large N el Problem 2b: Large N el requires large size of storage node (capacitor) Problem 2c: Series resistance of the storage capacitor increases with scaling V cap =10 -15 cm 3 N el ~10 5 (a=10 nm, K=100)
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9 Charge-based injection “easy” in DRAM: Barrierless transport… Write (>25fF) a~10 nm t w ~0.1-1 ns K=100 Dominates at a <10 nm
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DRAM summary 10 -Low barrier height-Volatility a =15 nm Vol cap ~10 6 nm 3 E w ~3 10 -14 J DRAM inherent issues: Selector Sensor - Remote sensing – Large size of Storage node E t V~10 -9 J-ns-nm 3 Vol FET =10 5 nm 3 E w ~10 -14 J Vol cap ~5 10 5 nm 3 Vol FET =10 4 nm 3 a =30 nm E t V~10 -8 J-ns-nm 3 T a =1 sT a =10y
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Flash in the limits of scaling 11 Selector Storage Node Sensor ~10 nm ~6nm ~20nm N el ~10 Vol storage =2000 nm 3 Vol FET ~3 a 3 ~3000nm 3 N el ~10
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Voltage-Time Dilemma u For an arbitrary electron-charge based memory element, there is interdependence between operational voltage, the speed of operation and the retention time. u Specifically, the nonvolatile electron-based memory, suffers from the “barrier” issue: v High barriers needed for long retention do not allow fast charge injection v It is difficult (impossible?) to match their speed and voltages to logic 12
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Flash Summary 13 E~10 -16 J t ~1 s=1000 ns E t V~10 -9 J-ns-nm 3 The minimum space-action metric is approximately the same as for the DRAM Vol storage =2000 nm 3 Vol FET ~3 a 3 ~3000nm 3
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14 Conclusion on ultimate charge- based memories u All charge-based memories suffer from the “barrier” issue: v High barriers needed for long retention do not allow fast charge injection v It is difficult (impossible?) to match their speed and voltages to logic n Voltage-Time Dilemma Non-charge-based NVMs? The Choice of Information Carrier
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Spin torque transfer MRAM (Moving spins): Energy Limit 15 D. Weller and A. Moser, “Thermal Effect Limits in Ultrahigh-Density Magnetic Recording”, IEEE Trans. Magn. 36 (1999) 4423 t store >10 y E b = KV > ~1.4 eV (f 0 ~10 9 -10 10 c -1 ) the anisotropy constant of a material volume
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FET selector is biggest component of STT- MRAM in the limits of scaling 16 11 nm V=1500 nm 3 N spin ~10 5 J-G. Zhu, Proc. IEEE 96 (2008) 1786 Selecting FET Storage Node E b = KV >1.4eV (the anisotropy constant of a material) K~0.1-1 J/cm 3 volume Vol FET ~3 a 3 ~3000nm 3
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STT-RAM summary 17 (Alternative estimate based on optimistic write current/write time projections: I w ~10 7 A/cm 2 and t w ~1 ns E w ~10 7 A/cm 2 11nm 2 1V 1 ns~10 -14 J V=1500 nm 3 (e.g. 11nm 2 2 nm) E t V~10 -11 -10 -10 J-ns-nm 3 This looks a little better than the electron-based we looked at earlier! E w ~N spin E b ~10 5 10 -19 ~10 -14 J Vol FET ~3 a 3 ~3000nm 3
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Scaled ReRAM (courtesy Dr. In YOO/Samsung) 18
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Ultimate ReRAM: 1-atom gap A B E b =0.38 eV d t =0.075 nm d t <<a V=0.5 V ON/OFF~1.61
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Ultimate ReRAM: 2-atom gap E b =2.63 eV d t =0.37 nm d t <a V=0.5 V ON/OFF~476 B A
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Ultimate Atomic Relay: 4-atom gap Energy E b (energy barrier for diffusion) 0.5-1 eV
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Ultimate Atomic Relay: 4-atom gap Energy E b (energy barrier for diffusion) 0.5-1 eV (E b =0.5 eV, n>5)
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Ultimate ReRAM: A summary V=1nm 3 N at ~100 (64) E~N at *1eV~10 -17 J t w ~1 ns (can be shown) E t V~10 -17 J-ns-nm 3 Vol FET ~3 a 3 ~3000nm 3 E t V~10 -14 J-ns-nm 3 without FET with FET
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Summary 24 DRAM Flash STT-RAM ReRAM V stor, nm 3 1 10 5 N carriers 100 E w, J t w, ns Biggest component Storage Node Selector 1 ns 10 3 ns 1 ns Sensor FET 10 -14 10 -16 10 -14 10 -17 Space- Action, J-ns-nm 3 10 5 10 10 5 10 3 ~10 -10 ~10 -14 ~10 -9 Constraints by sensor not considered Main constraints due to sensor ~10 -8 -10 - 9 without FET Vol FET ~3000nm 3 With FET
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Summary u Memory cell design is a tradeoff between physical variables needed to achieve long retention times, and short write/read times. u A global metric, space-action, for all memory categories provides insights into most promising extremely-scaled memory devices based on fundamental physics u Scaling Limits of semiconductor component often dominate overall scaling for the memory cell u Our preliminary study suggests a good potential for ReRAM (some constraints are not considered) u Today’s memory technology meets Feynman’s challenge of placing the 24 volumes of Encyclopedia Britannica (~200 MB) on the head of a pin (~.025 cm^2). v Library of Congress (10 Terabytes) on 1 cm^2 by 2020? 25
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