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ECS642U Embedded Systems Digital I/O William Marsh.

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Presentation on theme: "ECS642U Embedded Systems Digital I/O William Marsh."— Presentation transcript:

1 ECS642U Embedded Systems Digital I/O William Marsh

2 2 ARM University Program Copyright © ARM Ltd 2013 Acknowledgement Some slides from ARM University Program lab-in-a- box Copyright acknowledged

3 Outline Principles of memory mapped I/O Using Keil μ Vision –Compile, Assemble, Link, Load –Memory map –Debug KL25Z memory layout GPIO Configuration and use –Bus Matrix –Pin multiplexing –Data direction –GPIO ports

4 Using KeilμVision

5 Compiling a Program Compile C program  assembly code Link with libraries  memory image Download Debug –Set breakpoints –Monitor variables PC Freedom KL25Z SDA debug

6 Compile and Assemble User program C code Start initialisation in assembler code –Symbolic machine code Useful to be able to read

7 Download MCU program held in Flash Memory –Non-volatile Flash memory also contains ‘loader’ program Once downloaded, program stays Runs on reset button

8 Debugging ‘Debug connector’ on Freedom Board Breakpoint –Stop program at a program address Monitor variable –Observe global variable value …

9 Memory Mapped I/O

10 I/O Ports ‘alias’ memory locations Load and store operations used for I/O C program: –Variable –‘Volatile’

11 Cortex M0+ MCU Memory Map 0x0000_0000 0x0001_FFFF 16 KB SRAM 128KB Flash 0x2000_0000 0x2000_2FFF 0x1FFF_F000 SRAM_U (3/4) SRAM_L (1/4) KL25Z128VLK4

12 Memory Areas Flash memory –0x0000 0000 – 0x0001 FFFF –128 KByte –Used for program code SRAM –Data (or code) –16 KBytes: 0x1FFF F000 - 0x2000 2FFF

13 General Purpose I/O

14 Overview How do we make a program light up LEDs GPIO – General Purpose I/O –Basic Concepts –Port Circuitry –Control Registers –Accessing Hardware Registers in C –Clocking and Muxing Circuit Interfacing –Inputs –Outputs Additional Port Configuration

15 Basic Concepts GPIO –Input: is input signal is a 1 or a 0? –Output: set output to 1 or 0 Can use this to interface with external devices –Input: switch –Output: LEDs 3 Colour LED on the KL25Z board is active low

16 Output Example: Driving LEDs Safe current for –LED and –MCU port driver Use resistor –R = (VDD – VLED)/ILED Set ILED = 4 mA VLED depends on LED colour –Red: ~1.8V Blue: ~2.7 V Solve for R given VDD = ~3.0 V –Red: 300ΩBlue: 75Ω

17 KL25Z GPIO Ports Port A (PTA) to Port E (PTE) –32 bits Not all port bits are available –Depends on package pin count

18 GPIO Port Bit Circuitry in MCU Configuration –I or O –Pin control Writing –(Value) –Clear –Set –Toggle Reading –Value

19 Control Registers One set for each port –32 bits

20 PDDR: Port Data Direction Each bit can be input or output Input: 0 Output: 1 Reset clears port bit direction to 0

21 Writing Output Port Data Direct –value to PDOR Toggle –1 to PTOR Clear (to 0): –Write 1 to PCOR Set (to 1): –Write 1 to PSOR

22 Reading Input Port Data Read from PDIR

23 Connecting a GPIO Signal to a Pin Multiplexer  alternative use of pins What should pin be connected with internally? Each configurable pin has a Pin Control Register

24 Alternative Pin Configuration Each pin has multiple uses

25 Pin Control Register (PCR) Each pin has a PCR Also controls interrupts

26 Pin Control Register (PCR) 3 bit control multiplexing – what is pin used for?

27 Enable the Clock Enable clock to GPIO module –GPIO modules Disabled to save power –Using an unclocked module  fault Control register SIM_SCGC5 –Clocks to GPIO ports –Enable clock to Port A Header file MKL25Z4.h has definitions BitPort 13PORTE 12PORTD 11PORTC 10PORTB 9PORTA SIM->SCGC5 |= (1UL << 9); SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;

28 Summary of Configuration Enable clock to GPIO port Set pin to GPIO function –MUX = 1 Set direction of pin(s) on GPIO port –Some pins input –Some pins output

29 Review of Configuration Code

30 Config Code – Review Enable clock Note –bitwise or of two masks –|= used to leave other bits unchanged // Enable clock to ports B and D SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTD_MASK;

31 Config Code – Review Pin multiplexing: selecting GPIO Why 2 assignments? // Make 3 pins GPIO PORTB->PCR[RED_LED_POS] &= ~PORT_PCR_MUX_MASK; PORTB->PCR[RED_LED_POS] |= PORT_PCR_MUX(1); PORTB->PCR[GREEN_LED_POS] &= ~PORT_PCR_MUX_MASK; PORTB->PCR[GREEN_LED_POS] |= PORT_PCR_MUX(1); PORTD->PCR[BLUE_LED_POS] &= ~PORT_PCR_MUX_MASK; PORTD->PCR[BLUE_LED_POS] |= PORT_PCR_MUX(1);

32 Config Code – Review Make ports output: –data direction register // Set ports to outputs PTB->PDDR |= MASK(RED_LED_POS) | MASK(GREEN_LED_POS); PTD->PDDR |= MASK(BLUE_LED_POS);

33 Summary Memory mapped I/O has registers for: –For configuring operation –For doing I/O Most pins are multiplexed –All pins are GPIO Also have to configure clocks signal to GPIO Port


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