1. Semiconductor memories

2. Memories /38
Types of semiconductor memories Memory chip parameters Chosen types of memories Memory map Timings

3. programme memory (ROM)
Memories /38
The application of semiconductor memories:
configur. memory
semiconductor disks
timers RTC
address decoders
memory servicing devices
interrupt controllers
secondary memories.
processor
programme memory (ROM)
data memory (RAM)
operator devices
commu-nication devices
process devices
main memory
video memory
buffering memories

4. Semiconductor memories
Memories - types /38
memory keeping data during power off
memory losing data during
power off
Semiconductor memories
volatile
non-volatile
shifting registers
CCD - charge coupling devices
with sequence access
static dynamic
(SRAM) (DRAM)
parallel classic
(bipol.,unipol.) (unipol.)
serial pseudo-static
(unipol.) (unipol.)
standard

5. Memories - SRAM 5/38 Single bit of SRAM: bipolar unipolar +U
RD amplifier
word select line +U
bipolar
word select line
RD amplifier
Udd
Uss=0
unipolar

6. Typical read and write cycles of SRAM
Memories - SRAM /38
Typical read and write cycles of SRAM
read
ADR CE
R/W
D0..D7
write
ADR CE
R/W
D0..D7

7. Memories - SRAM /38
SRAM examples:

8. resistor means the charge leakage of real capacitor
Memories - DRAM /38
DRAM single bit:
Uss=0
word select line
RD amplifier
resistor means the charge leakage of real capacitor

9. Memories - DRAM /38

10. Memories - DRAM 10/38 Basic cycles: reading writing A8..A15 A0..A7 ADR
RAS
CAS
DATA
tACAS
tARAS
Dout
WE = 1
A8..A15
A0..A7
writing
ADR
RAS
CAS WE
DATA
Din

11. Memories - DRAM 11/38 modification page read A8..A15 A0..A7 ADR RAS
CAS WE
Dout
Din
page read
Dout
A8..A15
A0..A7
ADR
RAS
CAS
DATA
WE = 1

12. Memories - DRAM 12/38 basic refresh cycle hidden refresh cycle ADR RAS
row address
ADR
RAS
WE = 1
CAS = 1
ADR
RAS
CAS
DATA
hidden refresh cycle
A8..A15REF
A8..A15
A0..A7
Dout
WE = 1

13. Memories - DRAM /38
DRAM refresh techniques:
1. Burst refresh - for instance each 2ms processor is stopped and the whole set of rows addresses needed for memory refresh is generated.
2. Cycle steal - generation of successive refresh addresses realised in the moments, in which processor doesn’t used the system bus
(for example after op-code fetch), but there are situations that processor is halted or held by DMA and refresh should be realised in other way.
Attention: Modern DRAM chip have built-in refresh circuit.

14. Memories - DRAM /38
Block structure of Siemens’ 4Mx1b memory chip with built-in refresh circuit:

15. Example of simple DRAM control circuit:
Memories - DRAM /38
Example of simple DRAM control circuit:
A7..A13
A0..A6
MPX 
DRAM A0 A6
CAS RAS
ADR0 .
ADR6
MREQ
RFSH        
50ns
there are also special DRAM control chips: 3242, 8202 (IBM PC)

16. Memories - DRAM /38
Examples of the classical DRAMs:

17. Memories - DRAM /38
FPM DRAM (Fast Page Mode DRAM) - dedicated for x486 systems, bus frequency up to 66MHz, typical wait timings
EDO DRAM (Extended Data Out DRAM) - increased speed by possibility transfer of the next address during previous read cycle, bus frequency up to 50MHz, typical wait timings
BEDO DRAM (Burst EDO DRAM) - fast, bus frequency up to 100MHz, needs special chipset, rarely used, typical wait timings
SDRAM (Synchronous DRAM) - access time about 10ns, bus frequency 100MHz and more (6ns at 143MHz), typical wait timings , possible simultaneous access to both open pages, built-in auto-refresh.

18. Memories - DRAM /38
DDR SDRAM (Double Data Rate SDRAM) - transfer on both slopes of the clocking signal - double read speed of data blocks.
ESDRAM (Enhanced SDRAM) - internal SRAM buffers double memory efficiency.
DRDRAM (Direct Rambus DRAM) - special fast buses with DRDRAM and frequency up to 400MHz and transfer on both slopes of the clocking signal, transfer 1,6-2,4GB/s, non-standard mechanical construction.
SLDRAM (Synchronous Link DRAM) - SDRAM extension, transfer speed up to 3,2GB/s, electrically and mechanically compatible with SDRAM.
SGRAM (Synchronous Graphic RAM) - fast (100MHz), single-port memory for graphic applications.
VRAM (Video RAM) - fast, dual-port memory for graphic applications.

19. Memories - technologies 19/38

20. Semiconductor memories
Memories - types /38
memory keeping data during power off
memory losing data during
power off
Semiconductor memories
volatile
non-volatile
shifting registers
CCD - charge coupling devices
with sequence access
static dynamic
(SRAM) (DRAM)
parallel classic
(bipol.,unipol.) (unipol.)
serial pseudo-static
(unipol.) (unipol.)
standard
ROM
PROM
EPROM
(serial & parallel.)
EEPROM (E2PROM)
(serial & parallel)
NVRAM (SRAM+EEPROM)
FLASH
(3 types)
FRAM
bi- po-lar
uni-po-lar
unipolar

21. Memories - ROM /38
Features:
programmed only during manufacturing;
long-lasting and expensive manufacturing cycle;
programme error causes useless of whole chip series;
expensive debugging (multiple re-designing of chip contents);
low cost of single memory chip with debugged programme in mass manufacturing.

22. Memories - PROM 22/38 Single bit PROM: bit programming:
Vcc=12,5V Up=8V
word select line
Vcc 7V Q0
12,5V
„0” - 0V
„1” - 8V
Ube

23. Memories - EPROM 23/38 Single bit EPROM: DATA BUFFER RD/WR AMPLIFIER
COLUMN DECODER
R O W
D E C O D E R A
D D R E S S
B U F F E R
WE/CS
PROG

24. Memories - EPROM /38
EPROM examples:

25. Memories – EEPROM (E2PROM) 25/38
EEPROM (Electrically Erasable Programmable Read Only Memory) features :
internal structure based on EPROM;
additional transistor per each bit allows individual erasing and programming;
higher number of reprogramming cycles;
erasing and reprogramming can last up to 10ms;
with parallel access – equivalent to EPROMs, or serial access (with I2C, SPI)- as a configuration memory;
parallel EEPROMs can allow programming of blocks of bytes (64B, 128B, 256B): new data is buffered in local SRAM and then simultaneous programming of whole block starts.

26. Memories - NVRAM /38
Example of NVRAM structure:

27. Memories - NVRAM /38
the working of NVRAM:
operating of the built-in capacitor

28. Memories - FLASH /38
structure of storing transistor:

29. Memories - FLASH /38
Types of the FLASH memories:
1. Standard - equivalent to EEPROM; with access time ns; Ucc = 5V; Icc  30mA; examples: 28F256A, 28F512, 28F010, 28F020.
2. Flash file - internally divided into independent blocks of equal capacity (64kB); access time: ns; Ucc = 5V or 3,3V; capacities.: 1MB, 4MB, 2Mx16; examples: 28F008SA, 28F016SA, DD28F032SA)

30. Memories - FLASH /38
Types of the FLASH memories (cont.):
3. Boot-block flash - characteristic pin RP - Reset-Powerdown, switching-off memory chip (ISB  0,05A); whole memory divided into specific blocks:
8kB Boot Block for initial programme, down-loader;
2 x 4kB independent Parameter Block working as configuration memory instead additional NVRAM or EEPROM chips;
112kB Main Block - for the rest of software.
access time ns; organization 8- or 16-bit; Ucc = 5V or 3,5V;

31. Two types of boot-block FLASH:
Memories - FLASH /38
Two types of boot-block FLASH:
Blocks sequence depends on target processor:
8kB Boot Block
4kB Param. Block
112kB Main Block
1FFFF
00000
dedicated for 8xx86 family
112kB Main Block
4kB Param. Block
8kB Boot Block
1FFFF
00000
dedicated for: MCS51, MCS96, MC68xx, Z80, Z8000

32. modified construction
Memories - FRAM /38
Single bit FRAM:
word select line
RD amplifier +U
Uss=0
primary construction
word select line
RD amplifier +U
Uss=0
modified construction
capacitor with ferro-electric

33. Memories - FRAM /38
Available FRAMs:
with serial interfaces: I2C (0,4..1MHz), SPI (2,1..5MHz);
with parallel interface (for building main-memory blocks);

34. Semiconductor memories
Memories - types /38
memory keeping data during power off
memory losing data during
power off
Semiconductor memories
volatile
non-volatile
shifting registers
CCD - charge coupling devices
with sequence access
static dynamic
(SRAM) (DRAM)
parallel classic
(bipol.,unipol.) (unipol.)
serial pseudo-static
(unipol.) (unipol.)
standard
ROM
PROM
EPROM
(serial & parallel.)
EEPROM (E2PROM)
(serial & parallel)
NVRAM (SRAM+EEPROM)
FLASH
(3 types)
FRAM
bi- po-lar
uni-po-lar
unipolar
zero-power RAM
MRAM, OUM, RRAM, polymer, nano-mechanical

35. Memories - zero-power RAM 35/38
Memory structure:

36. Memories - zero-power RAM 36/38
MRAM - magnetoresistive RAM, two magnetic layers separated by dielectric
OUM (Ovonic Unified Memory) - materials as in CD-RW disks, but writing and reading realized electrically
RRAM - resistive memory, uses the material which alters its resistance under electric field
polymer - utilization of the ion structure changes inside polymer under electric field, high density of bit (also in 3D), transistors need only to control the memory array
nano-mechanical - np. millipede IBMa

37. Memories - specific parameters 37/38
Specific parameters of semiconductor memory:
organization (1-bit, k-bit, byte);
capacity (number of data bits stored in chip);
supply parameters (operating voltage / data retention voltage, operating current / standby current / data retention current);
volatile or non-volatile;
data outputs load capacity;
time characteristic (access time, cycle time, transfer speed).

38. Memories - specific parameters 38/38
Comparison of chosen memory types