1. 1 Radiation damage effects in Monolithic Active Pixel Sensors Implemented in an 0.18µm CMOS process Dennis Doering, Goethe-University Frankfurt am Main on behalf of the CBM-MVD-Collaboration Outline - MAPS sensors - Mechanism of ionizing radiation damage - Going to a smaller 0.18µm feature size - Status of radiation hardness - Conclusion AD AD vanced MO MO nolithic S S ensors for

2. /17/14 Applications of MAPS Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 2 Picture STAR Picture CBM International Linear Collider CBM-Experiment (FAIR, GSI) STAR-Experiment MAPS are developed for applications as vertex detector since 1999 at IPHC (Strasbourg). Possible ITS-Upgrade ALICE

3. /17/14 Operation principle of MAPS Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 3 +3.3V Output SiO 2 N+ P+ P- P+ Diode Epitaxial Layer P-Well Source Follower

4. /17/14 Noise measurement Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 4 1)Measured noise [mV] at the output 2)Charge-to-voltage conversion by the readout chain gain 3)Calculate ENC [e] +3.3V Readout chain Gain Measured noise [mV] ENC [e] Output

5. /17/14 Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 5 Classesof radiation damage Classes of radiation damage To be investigated and improved: Radiation hardness against… … ionizing radiation: Energy deposited into the electron cloud Can ionize atoms and destroy molecules Caused by charged particles and photons … non-ionizing radiation: Energy deposited into the crystal lattice Atoms are displaced Caused by heavy (fast leptons, hadrons), charged and neutral particles Farnan I, HM Cho, WJ Weber, 2007. "Quantification of Actinide α-Radiation Damage in Minerals and Ceramics." Nature 445(7124):190-193. DPG Mainz 2012 HK 12.8 ~10 14 n eq with high-resistivity sensor Discussed in this talk

6. /17/14 Ionizing radiation damage effects Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 6 1)Ionizing radiation damage generates electrons at Si/SiO2 interface 2)Leakage current and ENC [e] increases 3)Gain is constant 4)Measured noise [mV] increases +3.3V Gain Measured noise [mV] ENC [e] Output

7. /17/14 Going to smaller feature size Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 7 1)Measured noise [mV] decreases! Mind the different scale! 0.35µm CMOS process „new“ 0.18µm CMOS process

8. /17/14 Going to smaller feature size Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 8 1)Measured noise [mV] decreases! 2)Reason: Gain drops after 10Mrad Mind the different scale! 0.35µm CMOS process „new“ 0.18µm CMOS process

9. /17/14 Going to smaller feature size Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 9 1)Measured noise [mV] decreases! 2)Reason: Gain drops after 10Mrad 3)ENC [e] does not increase up to 3Mrad, after 10Mrad increase to ~30e Mind the different scale! 0.35µm CMOS process „new“ 0.18µm CMOS process

10. /17/14 Comparison of 0.18 and 0.35µm process Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 10 - 0.18µm has a much more larger intrinsic ionizing radiation tolerance than 0.35µm - Still drawbacks in noise. Status: Origin identified, being fixed with opimized transistor layout Transistor layout in 0.18µm not yet optimized for noise

11. /17/14 Signal to noise ratio Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 11 Signal to noise ratio well above the critical value of 15.  Expect tolerance to 3Mrad, plausibly also to 10Mrad. (Both to be confirmed in a beam time)

12. /17/14 Beam test result by IPHC Strasbourg Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 12 CBM SIS100 0.18µm MIMOSA-32 Rad. hard. non-io. >10 13 n eq Rad. hard. io > 1 Mrad Radiation hardness requirements of CBM@SIS100 achieved by MIMOSA-32.

13. /17/14 Summary Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 13 MAPS implemented in a smaller (0.18µm) feature size CMOS process. - Noise of 0.18µm is still higher than known from 0.35µm. - Possible Origin identified, optimization is ongoing. - Sufficient radiation tolerance for CBM@SIS100 was demonstrated in a beam test. - Noise of only ~30e and S/N>30 (MPV) observed after 10Mrad. - Sufficient for excellent detection efficiencies for MIPS (to be confirmed in beam test). -Next steps: Add on-chip data sparsification circuits without losing radiation tolerance.

14. /17/14 Conclusion Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 14 High-resistivity Smaller feature size Radiation damage: Ionizing Radiation damage: Non-ionizing

15. /17/14 Progress in sensor development Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 15 CBM SIS100 MAPS* (2003) Single point res. ~ 5 µm1.5 µm Material budget < 0.3% X 0 ~ 0.1% X 0 Rad. hard. non-io. >10 13 n eq 10 12 n eq Rad. hard. io > 1 Mrad200 krad Time resolution < 30 µs~ 1 ms *Optimized for one parameter

16. /17/14 Non-ionizing radiation: High-resistivity Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 16 Shown: DPG Mainz 2012 HK 12.8 Paper in preparation for publication High resistivity epitaxial layer increases radiation hardness by one order of magnitude

17. /17/14 Ionizing radiation: 0.18µm process Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 17 CBM SIS100 0.18µm MIMOSA-32 Rad. hard. non-io. >10 13 n eq Rad. hard. io > 1 Mrad

18. /17/14 Progress in sensor development Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 18 CBM SIS100 MAPS* (2003) MAPS* (2012) Single point res. ~ 5 µm1.5 µm1 µm Material budget < 0.3% X 0 ~ 0.1% X 0 ~ 0.05% X 0 Rad. hard. non-io. >10 13 n eq 10 12 n eq >3·10 14 n eq Rad. hard. io > 1 Mrad200 krad> 1 Mrad Time resolution < 30 µs~ 1 ms~ 25 µs *Optimized for one parameter High-resistivity 0.18µm process See: HK 9.5 Mo 12:15: Dennis Doering: MAPS in 0.18µm process This Session

19. /17/14 Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 19 High-resistivity0.18µm process

20. /17/14 CMOS Monolithic Active Pixel Sensors Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 20 CBM SIS100 MAPS (2003) 0.35µm (2010) Single point res. ~ 5 µm1.5 µm4 µm Mat. budget [X 0 ] < 0.3%~ 0.1%~ 0.05% Rad. hard. non-io. [n eq /cm²] >10 13 10 12 >10 13 Rad. hard. io. [krad] > 1 000200> 500 Time resolution < 30 µs~ 1 ms110 µs

21. /17/14 CMOS Monolithic Active Pixel Sensors Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 21 CBM SIS100 MAPS (2003) 0.35µm (2010) 0.18µm (2012) Single point res. ~ 5 µm1.5 µm4 µm Mat. budget [X 0 ] < 0.3%~ 0.1%~ 0.05% Rad. hard. non-io. [n eq /cm²] >10 13 10 12 >10 13 Rad. hard. io. [krad] > 1 000200> 500Smaller oxid layers Time resolution < 30 µs~ 1 ms110 µsMore complex logic possible

22. /17/14 Ionizing rad. Damage: Signal to Noise ratio Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 22 Preliminary Critical limit Signal to Noise ratios seem sufficient even after 10Mrad

23. /17/14 Open issues: Noise tails Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 23 Mi32TER

24. /17/14 Open issues: Noise tails Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 24 Mi32TER Probable origin: 1/f-noise

25. /17/14 Deep Pwell: PMOS-transistors possible Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 25 No change in charge spectrum observed,  It is allowed to operate a PMOS transistors without drawbacks in charge collection P7: deep pwell everywhere Mi32TER Deep P-Well Diode PMOS-Transistor (simplified) d

26. /17/14 Deep PWell hampers charge collection, reduces depleted zone of diode. Recovered for d=10µm: Size of the diode hole? Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 26 Mi32TER Deep P-Well Diode PMOS-Transistor (simplified) d

27. /17/14 Ionizing rad. damage: Response to MIPs Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 27 As expected: No influence on the response Zeigen?

28. /17/14 Noise and fake hit rate Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 28 Threshold: 5 x noise Noise increases with decreasing transistor size. Fake hit rates increases despite of noise adapted thresholds => Non Gaussian No clear temperature trend =>1/f noise? Mi32TER ELTStdSmallTiny SF Transistor size ELTStdSmallTiny SF Transistor size

29. /17/14 Vary the transistor size Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 29 Mi32TER

30. /17/14 Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 30 Deep P-Well Diode PMOS-Transistor (simplified) d No DPWell d= 6µm d=10µm For d=6µm, the depletion depth and the CCE is slighly reduced Mostly recovered for d=10µm

31. /17/14 Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 31

32. /17/14 Fake hit rate (transistor size) Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 32 Small transistor => dramatically higher fake hit rate

33. /17/14 A possible explanation Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 33 N Pixel per bin hottest pixel ~50e hottest pixel > 80e Small gate => wide noise distribution => many hot pixels

34. /17/14 Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 34 WidthLengthNoise [ADU] (20°C, +/-10%) Gain [e/ADU] (20°C) Noise [ENC] (20°C, +/-10%) ELT1.8512.122.4 1.5 µm0.2 µm1.8711.120.8 0.9 µm0.2 µm2.1510.522.5 0.5 µm0.2 µm2.4110.124.3 Small gate => 10% more gain Small gate => 25% more noise Small gate => 20% more noise Noise standard: PedestalFinal In TOWER 0.18µm: Small gate => Few more gain Small gate => Substantially more noise

35. /17/14 Applications of MAPS Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 35 Picture STAR Picture CBM International Linear Collider CBM-Experiment (FAIR, GSI) STAR-Experiment MAPS are developed for applications as vertex detector since 1999 at IPHC (Strasbourg).

36. /17/14 Operation principle Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 36 SiO 2 N+ P+ P- P+ Sensing diode Epitaxial Layer P-Well Substrate N+ 50 µm ~50 µm thin sensors ⇒ low material budget High granularity ⇒ good spatial resolution 10-40 µm => a few µm resolution

37. /17/14 Operation principle Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 37 SiO 2 N+ P+ P- P+ Epitaxial Layer P-Well Substrate e- N+ e- Particle Sensing diode

38. /17/14 Non-ionizing radiation effects: Signal response Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 38 SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate N+ e- Sensing diode Defects

39. /17/14 Signal response Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 39

40. /17/14 Non-ionizing radiation effects: Leakage current/Noise Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 40 SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate N+ - - Sensing diode Defects

41. /17/14 Noise Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 41 Radiation damage

42. /17/14 Noise Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 42 Radiation damage

43. /17/14 Noise Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 43 Radiation damage Cooling 2 times higher noise with respect to unirradiated

44. /17/14 Non-ionizing radiation effects Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 44 SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate N+ e- - - Sensing diode Defects

45. /17/14 Non-ionizing radiation effects Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 45 SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate N+ e- - - Radiation damage Sensing diode Defects

46. /17/14 Non-ionizing radiation effects Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 46 SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate N+ e- - - Radiation damage Sensing diode Defects

47. /17/14 Signal to Noise ratio Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 47 S/N limit (MIPS) Technical feasible limits reached: - Pixel pitch - Operating temperature Region of interest ?

48. /17/14 High-resistivity Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 48 Larger depleted volumes ⇒ guided charge collection ⇒ Improved charge collection efficiency (CCE) SiO 2 N+P+ P- P+ Epitaxial Layer P-Well Substrate depleted volume Low-resistivity High-resistivity High-resistivity: Decrease of doping concentration in epitaxial layer. Sensing diode

49. /17/14 Signal response Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 49

50. /17/14 Signal response Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 50 More charge collected in a high resistivity epitaxial layer.

51. /17/14 Signal response Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 51 Radiation damage effect after 3·10 14 n eq /cm²: Some signal get lost due to recombinations. However, the high resistivity sensor is even irradiated better than the low resistivity sensor unirradiated.

52. /17/14 Improvements using high resistivity Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 52 Error bars: Signal fit uncertainty * 10% noise uncertainty *Beam test is pending S/N limit (MIPS) * Parameters: - Pixel pitch - Operating temperature - Resistivity of epitaxial layer

53. /17/14 How to improve the non-ionizing radiation hardness of MAPS: -Operate the sensor at low temperature ( -30°C) -Small pixel pitch ( 10µm) -High-resistivity epitaxial layer (used here 400 Ωcm) Conclusion Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 53

54. /17/14 How to improve the non-ionizing radiation hardness of MAPS: -Operate the sensor at low temperature ( -30°C) -Small pixel pitch ( 10µm) -High-resistivity epitaxial layer (used here 400 Ωcm) ⇒ Radiation hardness beyond 3·10 14 n eq /cm² Conclusion Dennis Doering: MAPS in 0.18µm CMOS process DPG Dresden March 2013 54