1. Chapter 1 Computer Abstractions and Technology

2. Chapter 1 — Computer Abstractions and Technology — 2 The Computer Revolution Progress in computer technology Underpinned by Moore’s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive §1.1 Introduction

3. Chapter 1 — Computer Abstractions and Technology — 3 Classes of Computers Desktop computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized Embedded computers Hidden as components of systems Stringent power/performance/cost constraints

4. Chapter 1 — Computer Abstractions and Technology — 4 The Processor Market

5. CSCI-365 Coordination of many levels (layers) of abstraction I/O systemProcessor Compiler Operating System (Mac OSX) Application (ex: browser) Digital Design Circuit Design Instruction Set Architecture Datapath & Control transistors Memory Hardware Software Assembler What is CSCI-365?

6. Chapter 1 — Computer Abstractions and Technology — 6 What You Will Learn How programs are translated into the machine language And how the hardware executes them The hardware/software interface What determines program performance And how it can be improved How hardware designers improve performance What is parallel processing

7. Chapter 1 — Computer Abstractions and Technology — 7 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed

8. Chapter 1 — Computer Abstractions and Technology — 8 Below Your Program Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers §1.2 Below Your Program

9. Chapter 1 — Computer Abstractions and Technology — 9 Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability Assembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data

10. Chapter 1 — Computer Abstractions and Technology — 10 Components of a Computer Same components for all kinds of computer Desktop, server, embedded Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers §1.3 Under the Covers The BIG Picture

11. Chapter 1 — Computer Abstractions and Technology — 11 Anatomy of a Computer Output device Input device Network cable

12. Processor Computer Control (“brain”) Datapath (“brawn”) Memory (where programs, data live when running) Devices Input Output Keyboard, Mouse Display, Printer Disk (where programs, data live when not running) Anatomy of a Computer

13. Chapter 1 — Computer Abstractions and Technology — 13 Anatomy of a Mouse Optical mouse LED illuminates desktop Small low-res camera Basic image processor Looks for x, y movement Buttons & wheel Supersedes roller-ball mechanical mouse

14. Chapter 1 — Computer Abstractions and Technology — 14 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory

15. Chapter 1 — Computer Abstractions and Technology — 15 Opening the Box

16. Chapter 1 — Computer Abstractions and Technology — 16 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRAM memory for immediate access to data

17. Chapter 1 — Computer Abstractions and Technology — 17 Inside the Processor AMD Barcelona: 4 processor cores

18. Chapter 1 — Computer Abstractions and Technology — 18 Abstractions Abstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (ISA) The hardware/software interface Application binary interface The ISA plus system software interface Implementation The details underlying and interface The BIG Picture

19. Chapter 1 — Computer Abstractions and Technology — 19 A Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD)

20. Chapter 1 — Computer Abstractions and Technology — 20 Networks Communication and resource sharing Local area network (LAN): Ethernet Within a building Wide area network (WAN: the Internet Wireless network: WiFi, Bluetooth

21. Chapter 1 — Computer Abstractions and Technology — 21 Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced cost YearTechnologyRelative performance/cost 1951Vacuum tube1 1965Transistor35 1975Integrated circuit (IC)900 1995Very large scale IC (VLSI)2,400,000 2005Ultra large scale IC6,200,000,000 DRAM capacity

22. Microprocessor Complexity 2X Transistors / Chip Every 1.5 years Called “Moore’s Law” Gordon Moore Intel Cofounder Year # of transistors on an IC

23. Memory Capacity (Single-Chip DRAM) year size (Mbit) 19800.0625 19830.25 19861 19894 199216 199664 1998128 2000256 2002512 20041024 (1Gbit) 2006 2048 (2Gbit) Now 1.4X/yr, or 2X every 2 years 8000X since 1980! Bits Year

24. Memory DRAM capacity: 2x / 2 years (since ‘96); 64x size improvement in last decade Processor Speed 2x / 1.5 years (since ‘85); [slowing!] 100X performance in last decade Disk Capacity: 2x / 1 year (since ‘97) 250X size in last decade Computer Technology – Dramatic Change!

25. Performance Metrics Purchasing perspective given a collection of machines, which has the best performance ? least cost ? best cost/performance? Design perspective faced with design options, which has the best performance improvement ? least cost ? best cost/performance? Both require basis for comparison metric for evaluation Our goal is to understand what factors in the architecture contribute to overall system performance and the relative importance (and cost) of these factors

26. Chapter 1 — Computer Abstractions and Technology — 26 Defining Performance Which airplane has the best performance? §1.4 Performance

27. Chapter 1 — Computer Abstractions and Technology — 27 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now…

28. Chapter 1 — Computer Abstractions and Technology — 28 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Example: time taken to run a program 10s on A, 15s on B Execution Time B / Execution Time A = 15s / 10s = 1.5 So A is 1.5 times faster than B

29. Chapter 1 — Computer Abstractions and Technology — 29 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance

30. Chapter 1 — Computer Abstractions and Technology — 30 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10 –12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×10 9 Hz

31. Review: Machine Clock Rate Clock rate (clock cycles per second in MHz or GHz) is inverse of clock cycle time (clock period) CC = 1 / CR one clock period 10 nsec clock cycle => 100 MHz clock rate 5 nsec clock cycle => 200 MHz clock rate 2 nsec clock cycle => 500 MHz clock rate 1 nsec (10 -9 ) clock cycle => 1 GHz (10 9 ) clock rate 500 psec clock cycle => 2 GHz clock rate 250 psec clock cycle => 4 GHz clock rate 200 psec clock cycle => 5 GHz clock rate

32. Chapter 1 — Computer Abstractions and Technology — 32 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count

33. Chapter 1 — Computer Abstractions and Technology — 33 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be?

34. Chapter 1 — Computer Abstractions and Technology — 34 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix

35. Chapter 1 — Computer Abstractions and Technology — 35 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? A is faster… …by this much

36. Chapter 1 — Computer Abstractions and Technology — 36 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Relative frequency

37. Chapter 1 — Computer Abstractions and Technology — 37 CPI Example Alternative compiled code sequences using instructions in classes A, B, C ClassABC CPI for class123 IC in sequence 1212 IC in sequence 2411 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5

38. A Simple Example How much faster would the machine be if a better data cache reduced the average load time to 2 cycles? How does this compare with using branch prediction to shave a cycle off the branch time? What if two ALU instructions could be executed at once? OpFreqCPI i Freq x CPI i ALU50%1. Load20%5 Store10%3 Branch20%2  =

39. A Simple Example How much faster would the machine be if a better data cache reduced the average load time to 2 cycles? How does this compare with using branch prediction to shave a cycle off the branch time? What if two ALU instructions could be executed at once? OpFreqCPI i Freq x CPI i ALU50%1 Load20%5 Store10%3 Branch20%2  =.5 1.0.3.4 2.2 CPU time new = 1.6 x IC x CC so 2.2/1.6 means 37.5% faster 1.6.5.4.3.4.5 1.0.3.2 2.0 CPU time new = 2.0 x IC x CC so 2.2/2.0 means 10% faster.25 1.0.3.4 1.95 CPU time new = 1.95 x IC x CC so 2.2/1.95 means 12.8% faster

40. Determinates of CPU Performance CPU time = Instruction_count x CPI x clock_cycle Instruction_ count CPIclock_cycle Algorithm Programming language Compiler ISA Core organization Technology

41. Determinates of CPU Performance CPU time = Instruction_count x CPI x clock_cycle Instruction_ count CPIclock_cycle Algorithm Programming language Compiler ISA Core organization Technology X XX XX XX X X X X X

42. Chapter 1 — Computer Abstractions and Technology — 42 Performance Summary Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T c The BIG Picture

43. Chapter 1 — Computer Abstractions and Technology — 43 Power Trends In CMOS IC technology §1.5 The Power Wall ×1000 ×30 5V → 1V

44. Chapter 1 — Computer Abstractions and Technology — 44 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?

45. Chapter 1 — Computer Abstractions and Technology — 45 Uniprocessor Performance §1.6 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency

46. Chapter 1 — Computer Abstractions and Technology — 46 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization

47. Chapter 1 — Computer Abstractions and Technology — 47 Manufacturing ICs Yield: proportion of working dies per wafer §1.7 Real Stuff: The AMD Opteron X4

48. Chapter 1 — Computer Abstractions and Technology — 48 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology

49. Chapter 1 — Computer Abstractions and Technology — 49 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design

50. Chapter 1 — Computer Abstractions and Technology — 50 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point)

51. Chapter 1 — Computer Abstractions and Technology — 51 CINT2006 for Opteron X4 2356 NameDescriptionIC×10 9 CPITc (ns)Exec timeRef timeSPECratio perlInterpreted string processing2,1180.750.406379,77715.3 bzip2Block-sorting compression2,3890.850.408179,65011.8 gccGNU C Compiler1,0501.720.47248,05011.1 mcfCombinatorial optimization33610.000.401,3459,1206.8 goGo game (AI)1,6581.090.4072110,49014.6 hmmerSearch gene sequence2,7830.800.408909,33010.5 sjengChess game (AI)2,1760.960.483712,10014.5 libquantumQuantum computer simulation1,6231.610.401,04720,72019.8 h264avcVideo compression3,1020.800.4099322,13022.3 omnetppDiscrete event simulation5872.940.406906,2509.1 astarGames/path finding1,0821.790.407737,0209.1 xalancbmkXML parsing1,0582.700.401,1436,9006.0 Geometric mean11.7 High cache miss rates

52. Chapter 1 — Computer Abstractions and Technology — 52 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec)

53. Chapter 1 — Computer Abstractions and Technology — 53 SPECpower_ssj2008 for X4 Target Load %Performance (ssj_ops/sec)Average Power (Watts) 100%231,867295 90%211,282286 80%185,803275 70%163,427265 60%140,160256 50%118,324246 40%920,35233 30%70,500222 20%47,126206 10%23,066180 0%0141 Overall sum1,283,5902,605 ∑ssj_ops/ ∑power493

54. Chapter 1 — Computer Abstractions and Technology — 54 Pitfall: Amdahl’s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance §1.8 Fallacies and Pitfalls Can’t be done! Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast

55. Chapter 1 — Computer Abstractions and Technology — 55 Fallacy: Low Power at Idle Look back at X4 power benchmark At 100% load: 295W At 50% load: 246W (83%) At 10% load: 180W (61%) Google data center Mostly operates at 10% – 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load

56. Chapter 1 — Computer Abstractions and Technology — 56 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions CPI varies between programs on a given CPU

57. Chapter 1 — Computer Abstractions and Technology — 57 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance §1.9 Concluding Remarks