2. Lithography in the Top Down Method New Concepts

3. Lithography In the Top-Down Process New Concepts Learning Objectives –To identify issues in current photolithography –To quantify the needs of nanomanufacturing –To define improvements in photolithography –To explore new lithography processes –To define the limitations of these new processes in top-down nanomanufacturing

4. What are the limitations of current photolithography processes? Light sources from traditional mercury vapor lamps have little “deep UV” spectra Finer feature sizes require shorter wavelength sources Photoresist must be sensitive to appropriate wavelengths of light Lenses and optical components have limited numeric aperture

5. Why Shorter Wavelengths? Minimum Feature Sizes are dictated by the following relationship F = K (λ/NA) Where F = Feature Size in nM λ = Wavelength (nM) K = Process Constant NA = Numeric Aperture

6. Shorter Wavelength Sources Replace the mercury vapor lamp an excimer laser source with shorter wavelength emission –ArF – 193 nM – Shorter wavelength than so-called “deep UV” peak of 248nM –F 2 Laser – Low output but at 157nM Matching photoresist that is sensitive to this spectra is also required. Laser sources under development – 13.5 nM! (extreme UV or EUV range)

7. Numerical Aperture Light passing through the mask will be subject to diffraction. The numerical aperture of the lens used determines its capability to bring the diffracted pattern into a single point of focus. NA = n sin θ where n = index of refraction of the media in which the lens is working (air) and θ is the angular spacing between objects making up the image

8. Numerical Aperture (2) sin θ = 1.22 λ/D where θ is the angular spacing between objects and D = diameter of the lens A larger diameter lens helps, but is difficult to manufacture Depth of Field Issues limit the use of larger diameter as a solution Increased NA reduces depth of field Source: MATEC Module 41

9. Improving the Index of Refraction

10. Improving the Photomask Sharp edges in photo- masks are not well reproduced as feature sizes shrink Optical proximity correction techniques put borders on corners and edges to correct for this

11. Phase Shift Masking More complex mask includes “trim mask” Destructive interference optical effects attenuate patterns Effectively appears to be higher resolution http://www.asml.com/asmdotcom

12. Double Patterning Adjacent features are on two masks Avoids Rayleigh constraints on resolution Requires double the number of steps Requires additional masks and critical alignment of masks

13. Practice Questions 1. What limits feature sizes in photolithography? Click once for each question. Wavelength of the light source used 2. What effect causes blurring in photomasks? Diffraction of the light source 3. What is the limitation that occurs when numerical aperture is increased? Depth of field is decreased Numerical aperture of the lens

14. Alternative Exposure Methods Electron Beam Lithography Use of exposure sources other than UV light have been studied for some time. An electron beam is exceptionally “narrow”, and does not require a mask Low throughput limits use in manufacturing

15. Electron Beam Lithography (2) E-beam lithography also serves as a tool for mask making Throughput is not an issue in this case, since the masks are made once, and used many times. Sub-50 nM feature sizes are possible

16. X-Ray Lithography Synchrotron radiation sources can be used Masks use “absorber” materials on a membrane X-rays pass through the membrane PMMA photoresists can be used

17. X-Ray Lithography Issues Spacing, mask dimension, and wavelength are critical So-called “sweet spot” will provide small feature size for a given wavelength exposure and defined mask feature nfxrl@xraylithography.us

18. Nano-Imprint Lithography Concept – To use a “stamp” of precise dimension to create features in resist Advantages –High Throughput –No issues in diffraction –No secondary emission –Can be carried out in non-vacuum environment

19. Nano-Imprint Lithography (2) T-NIL (Thermal Nano-Imprint Lithography) –PMMA resist similar to that used in X-ray lithography is spin coated onto surface –Stamp is pressed into contact with surface –Substrate is heated to glass temperature of resist –Pressure is applied to “stamp” imprint –Substrate cools and stamp can be removed Http://www.nilt.com/Default.aspHttp://www.nilt.com/Default.asp? Action=Details&Item=219

20. UV-Nano Imprint Lithography UV-NIL (Ultra-violet Nano-Imprint Lithography) –A UV sensitive resist is used –The stamp must be UV- transmissive –UV light is applied through the stamp –Pressure is applied to “stamp” imprint Http://www.nilt.com/Default.aspHttp://www.nilt.com/Default.asp? Action=Details&Item=219

21. Issues in Nanoimprint Lithography Alignment of layers can be more difficult than with projection lithography “Proximity effect” of having large stamp areas near small features may cause uneven feature sizes Residual layer thickness and profile may vary Patterned areas may “stick” to stamp

22. AFM Probe Lithography An atomic force microcscope cantilever writes a pattern in resist –Extremely precise –“Scratching the surface” http://www.pacificnanotech.com/afm -modes_active-modes.html

23. AFM “Dip Pen” Lithography An atomic force microscope cantilever writes a pattern on the substrate –Extremely precise –Deposit inks or conductive coatings http://nanoink.net/WhatisDPN.htm

24. Sources and References 1]Maricopa Advanced Techology Education Center (2001) Module 40 The Photolithography Process [2] Chang, C.Y., & Sze, S. M. (1996). ULSI technology. New York: McGraw Hill. [3] Garza-Lopez, T., & Sancaktar, E. (2002) Excimer lasers, how they work and ablate. Vacuum and Coating Technology, 3, 52-59. [4] Hand, A. (2002) NGL: Forever next generation? Semiconductor International, 25, 57-64. [5] Quirk, M., & Serda, J. (2001) Semiconductor manufacturing technology. Upper Saddle River, NJ: Prentice Hall. [6] Van Zant, P. (2000). Microchip fabrication: A practical guide to semiconductor processing (4 th ed.). New York: McGraw Hill. [7] Wolf, S., & Tauber, R. N. (1986). Silicon processing the VLSI era. (vol. 1). Sunset Beach, CA: Lattice Press. [8] Xiao, H. (2001). Introduction to semiconductor manufacturing technology. Upper Saddle River, NJ: Prentice-Hall. [9] Bohr, M.T. (2006) “Intel’s Silicon R&D Pipeline, Intel Developer Forum, Moscow, April 26, 2006 [10] Brunner, Gil, Fonseca, and Seoung (2004) “New Opportunities for Semiconductor Manufacturing”, 2004 Immersion and 157nM Symposium, Sematech, August 3, 2004 [11] Sematech News, 21 May, 2007, International Sematech http://www.sematech.org/corporate/news/releases/20070521.htm http://www [12] Peters, Lauren (2008) “32nM Marked by Litho, Transistor Changes”, Semiconductor International http://www.semiconductor.net/article/CA6515401.html?nid=3656 http://www [13] R. S. Dhaliwal, W. A. Enichen, S. D. Golladay, M. S. Gordon, R. A. Kendall, J. E. Lieberman, H. C. Pfeiffer, D. J. Pinckney, C. F. Robinson, J. D. Rockrohr, W. Stickel, and E. V. Tressler PREVAIL—Electron Projection Technology Approach for Next-Generation Lithography,IBM Journal of Research andDhaliwalEnichenGolladayGordonKendallLiebermanPfeifferPinckneyRobinsonRockrohrStickelTressler Development V.45 #5 (2001)