1. South SG1 Trigger High Rate Sanghwa Park, Katsuro Nakamura, Yoshimitsu Imazu, and Itaru Nakagawa 1

2. OCTANT-1 DIAGNOSIS SG1 Rate~300Hz constant @ 40mV Threshold 2

3. SG1 Chain FPGA MRG ADTX LL1 DCMIF DCM MTP casset MTP fiber 1 2 3 456 7 8 9 10 FPGA Mask Threshold 3 11. No indication of high fake hits in DCM data.

4. Octant-1 Diagnostic Exams Exam SG1LL1 rate (ch1:300Hz@40mV)diagnosis 1Mask at LL10>= LL1 2 Fiber swap w/ oct2 at LL1 and FPGA Ch2 -> 300Hz>LL1 or FPGA 3Fiber swap w/oct2 at LL1 4MTP fiber swap w/ spare300HzMTP fiber is OK 5MPT casset swap300HzMTP casset is OK 6MRG board swap w/ spare300HzMRG is OK 7MRG FPGA down grade0 8ADTX fiber swap w/ ch2Ch1:1kHz, Ch2:0< MRG 9Threshold 100mV0 makes sense if ghost trigger is produced proportional to input rate 10Random TriggerNormalDCMIF chain is OK 4 Not yet done

5. Difference between Previous and Current MRG FPGA code Previous (mrg_prom021.xsvf) Current (mrg_prom036.xsvf) Process Speed ~ 10ns faster  t (St3 – St1) ~ 20ns  t (St2 – St1) ~ 8ns Minimize  t between stations Beam Clock Counter Employ Counter from ADTX Employ Counter within MRG Error Detection Memorize which ADTX channel cause the error 5 Upgrade : March 28, 2012 Run12: March 18 ~ April 18, 2012

6. Down grade FPGA Running with previous FPGA code quenches ghost SG1 trigger. At this moment, we are in the middle of second iteration to confirm the reproducibility. Each iteration we repeated start/stop run a couple ~ several times. So far, measurements are consistent. – Previous (mrg_prom021.xsvf) : 0Hz @ 40mV – Current (mrg_prom036.xsvf) : 300Hz @ 40mV 6

7. Threshold Scan Threshold change every stations all together. Threshold change every stations all together. Threshold [mV] SG1_South Rate [Hz] The threshold scan result indicates clear threshold dependence. The slope somewhat gets shallow between 30mV to 60mV. Compared to North, South rate responses quite shallow and not normal response. Plot by Dahee Threshold change only station-3a MRG#80 (rests are fixed at 40mV). Threshold change only station-3a MRG#80 (rests are fixed at 40mV). North 7

8. How do we explain threshold results? 8 FPGA MRG ADTX LL1 DCMIF DCM MTP casset MTP fiber 1 2 3 456 7 8 9 10 FPGA Mask Threshold 40mV 10mV 40mV 10mV 40mV 10mV x10 x Ghost trigger is issued at LL1 line downstream of LL1/DCMIF split, thus never appear in DCM. The magnification is proportional to hit rates sent from ADTX.

9. MRG_PROM021.XSVF Performance of Previous MRG FPGA Code Running in OCTANT-1 9

10. MUID1D trigger samples (HV on) 10

11. MUID1D trigger samples (HV on) 11

12. MUID1D trigger (HV on) Octant-3 masked off at LL1 LL1 width=3 100%! ~100%! 1.Oct3,7>Oct2,4,6,8>Oct1,5 2.LL1/EMU=100% 3.EMU/LL1=100% Oct3,7>Oct2,4,6,8>Oct1,5! 12

13. OCTANT-3 DIAGNOSIS High Rate Excursion of ~18min. Interval 13

14. Long Time Monitoring Excursion 14

15. Down grading to previous MRG FPGA SG1 South Rate [Hz] Previous FPGACurrent FPGA So far no high rate excursion observed with previous FPGA code. 15

16. When did this started? 16 FPGA Upgrade (Mar. 28, 2012) FPGA Upgrade (Mar. 28, 2012) - runtype: CALIBRATION data - triggerconfig: PP510Run12_Cosmic - run time > 10 min - MUIDLL1_N1D||S_1D trigger enabled. 40kHz S_SG1 rate Octant-3 Threshold=20mV for Cosmic Runs. Run Rate[kHz]

17. Run13 Threshold Response of Octant-1 North South Run12 Octant-1 Cosmic SG1~50kHz Run12 Octant-1 Physcs SG1~1kHz Plot by Dahee (Ewha University) 17 Run12 Cosmic Rate ~40kHz is consistent with present measurement. Physics run was operated at 30mV and likely to be operated around 1kHz.

18. Time dependent rate in Run12 Cosmic 18 mrg_prom021 mrg_prom036 S_SG1 Rate No indication of Oct-3 High rate excursion. Hidden under Oct-1 40kHz? Need Time dependent LL1SG1 rate Oct-by-Oct -> Josh developed in the past?

19. Octant-1 Diagnosis Station-1, Station-2 Mask Station-3b (done) Chip scope measurement using LL1 fire as trigger of chip scope Check the communication between MRG and LL1. How we know the communication error? Check the timing alignment error. Play with delay scan level-1 internal clock.(require LL1 FPGA modification) Perform MRG (process) delay scan (all stations at once) more precisely (to find the timing when LL1 started to fail align), 19

20. Summary So far high rates in both Oct-1 and Oct-3 are both disappears with down graded MRG FPGA code. Whether we run with mixed two FPGA code? Down grade all octants? Confirm stability using cosmic as long as possible. 20

21. MRG_PROM036.XSVF 21

22. Threshold Response of SG1.S Rate The threshold dependence doesn’t necessarily indicates the origin of ghost trigger to be upstream of MRG. Suppose origin of the ghost rate exists downstream of MRG, then its won’t be affected by the threshold, however St-1 and St-2 hits are affected by the threshold. As a consequence, SG1 trigger also affected by taking coincidence St1xSt2xSt3. The threshold should be changed only at Octant-1, Station3 MRG3a in order to test the response of SG1 trigger rate with respect to the problematic channel. 22

23. SG1 Self Trigger 23

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27. Acknowledgement Thank you for Sarah, Arbin, Francesca and John for helping us diagnosis the origin of high rate issue on South SG1. 27

28. BACKUP 28

29. MRG LL1 GL1 Oct-3 Excursion yes ADTX Oct-1 HighRate yes MRG LL1 GL1 no ADTX no ✖ mask MRG LL1 GL1 no ADTX ✖ mask Logic Test yes no yes no MRG LL1 GL1 no ADTX ✖ High Threshold yes no 10-13min no yes ~60min no 29

30. FPGA down grade Run#FPGASG1 Rate 3846150 3846160 384617mrg_prom021.xsvf0 3846240 3847830 3847840 384786mrg_prom036.xsvf300Hz 384787 384788 384797 30