1. Versatile Link The Versatile Transceiver Development Status Csaba Soos, Vincent Bobillier, Stéphane Détraz, Spyros Papadopoulos, Christophe Sigaud, Pavel Stejskal, Sarah Storey, Jan Troska, François Vasey CERN PH-ESE-BE

2. Versatile Link 2 Outline ● Introduction ● Component testing ● TOSA, ROSA ● Transceiver design ● PCB versions, Latch ● Transceiver testing ● Future work ● Summary Versatile Transceiver - Development Status TWEPP 2011

3. Versatile Link Versatile Link Project 3 ● Optical layer linking front-end to back-end up to 150 m distant. ● Bi-directional @ 5 Gbps ● Two Point-to-point solutions ● 850 nm Multimode ● 1310 nm Single-mode ● Front-end pluggable module ● Rad-hard front-end ● Joint Project Proposal submitted to ATLAS & CMS upgrade steering groups in 2007 and endorsed in 2008 ● Project Kick-off: April 2008 ● Phase I: Proof of Concept (18mo) ● Phase II: Feasibility Study (18mo) ● (Consolidation) ● Phase III: Pre-prodn. readiness (18mo) Versatile Transceiver - Development Status TWEPP 2011

4. Versatile Link Versatile Transceiver ● Based on SFP+ ● Industry standard ● Can support target speed: 5 – 10 Gb/s ● Customization ● Radiation-qualified commercial Laser and Photodiode ● Custom-designed radiation hard ASICs: GBLD and GBTIA ● Non-magnetic package: plastic LC latch ● Low mass 4 Versatile Transceiver - Development Status VTRx prototype with commercial driver and EE laser TWEPP 2011

5. Versatile Link Versatile Transceiver Specifications ● Specifications are available on EDMS ● Sub-components ● Entire module Versatile Transceiver - Development Status 5 Example: specifications of the optical parts TWEPP 2011

6. Versatile Link Testing Versatile Transceiver - Development Status 6 ROSA TOSA Static: LIV and RIN Dynamic test as full module Dynamic: BER-> Sensitivity Radiation tolerance test: Jan Troska et al. “Single-Event Upset testing of the Versatile Transceiver ” See poster #133 TWEPP 2011

7. Versatile Link TOSA Tests – LIV curve 7 ● Verify static characteristics of the laser ● Measure threshold current and the slope efficiency Versatile Transceiver - Development Status DUT Current source Receiver ILX Lightwave LDC-3714B Agilent 8163B/81495A TWEPP 2011

8. Versatile Link TOSA Tests – Relative Intensity Noise ● By measuring the intrinsic noise of the DC-biased laser we can extract important device parameters 8 DUT Current source Receiver Versatile Transceiver - Development Status ILX Lightwave LDC-3714B Agilent 8163B/81495A Agilent N9020A Spectrum analyser TWEPP 2011

9. Versatile Link GBTIA ROSA ● GBTIA was assembled by commercial partner with 2 PIN photodiode types ● InGaAs, 60 um with AR coating for 1310 SM and 850 MM operation ● GaAs, 70 um for 850 MM ● We tested 10 devices of each type at 4.8 Gb/s Versatile Transceiver - Development Status 9 TWEPP 2011

10. Versatile Link ● 60 um InGaAs meets requirements at 1310 nm with SMF ● 60 um InGaAs marginally meets requirements at 850 nm with MMF ● 70 um GaAs meets requirements at 850 nm with MMF GBTIA ROSA 10 Versatile Transceiver - Development Status TWEPP 2011

11. Versatile Link Printed Circuit Board Design ● Different VTRx versions require different boards ● Commercial laser driver + edge emitter laser ● Commercial laser driver + VCSEL ● GBLD ASIC + edge emitter laser ● GBLD ASIC + VCSEL ● VTTx (2 x VCSEL) ● Manufacturing in CERN and in an external company ● No major issues 11 Commercial driver + Edge Emitter Laser Commercial driver + VCSEL Versatile Transceiver - Development Status TWEPP 2011

12. Versatile Link Printed Circuit Board Simulation 12 ● Optimizing layout using simulator tools (pre-layout) ● Design verification (post-layout) ● ASIC designers can use PCB model for more realistic simulations ● Difficulties: still lacking good models of laser drivers and VCSELs Pre-layout Post-layout Versatile Transceiver - Development Status TWEPP 2011

13. Versatile Link ● Provides mechanical support for PCB, TOSA and ROSA ● Ensures good optical connection to/from TOSA/ROSA and LC optical connector ● Prototypes made using 3D prototyping techniques ● Easy to make variants for different TOSA/ROSA dimensions ● Radiation tolerance of material used to be proven ● Also investigating alternative materials & processes Latch Design 13 Versatile Transceiver - Development Status TWEPP 2011

14. Versatile Link VTRx Performance – ONET8501V + MM VCSEL 14 Versatile Transceiver - Development Status ParameterNormalization8mA10mA12mA OMAOMA/300uW 1.191.481.76 Eye HeightEye Height/(0.6*OMA) 1.241.251.26 ERER/3 1.331.762.31 1/T r (1/T r )/(1/70ps) 1.731.701.88 1/T f (1/T f )/(1/70ps) 1.591.521.45 1/T j (1/T j )/(1/0.25UI) 3.273.393.28 1/D j (1/D j )/(1/0.12UI) 22.8812.936.60 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

15. Versatile Link VTRx Performance – ONET8501V + SM VCSEL 15 Versatile Transceiver - Development Status ParameterNormalization8mA10mA12mA OMAOMA/300uW 0.881.071.25 Eye HeightEye Height/(0.6*OMA) 1.261.281.27 ERER/3 0.951.181.43 1/T r (1/T r )/(1/70ps) 1.38 1.43 1/T f (1/T f )/(1/70ps) 1.051.021.06 1/T j (1/T j )/(1/0.25UI) 2.072.121.88 1/D j (1/D j )/(1/0.12UI) 6.495.222.78 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

16. Versatile Link VTRx Performance – ONET1101L + EEL Versatile Transceiver - Development Status 16 ParameterNormalization30mA35mA40mA OMAOMA/300uW 1.271.491.70 Eye HeightEye Height/(0.6*OMA) 1.05 1.06 ERER/3 1.091.301.56 1/T r (1/T r )/(1/70ps) 2.132.142.17 1/T f (1/T f )/(1/70ps) 1.811.781.74 1/T j (1/T j )/(1/0.25UI) 2.812.912.99 1/D j (1/D j )/(1/0.12UI) 2.772.632.87 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

17. Versatile Link VTRx Performance – GBLDv3 + MM VCSEL 17 Versatile Transceiver - Development Status ParameterNormalization4mA5mA6mA OMAOMA/300uW 1.962.272.55 Eye HeightEye Height/(0.6*OMA) 1.091.261.35 ERER/3 1.541.912.25 1/T r (1/T r )/(1/70ps) 1.101.181.63 1/T f (1/T f )/(1/70ps) 0.920.900.87 1/T j (1/T j )/(1/0.25UI) 1.211.261.18 1/D j (1/D j )/(1/0.12UI) 0.930.970.90 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

18. Versatile Link VTRx Performance – GBLDv3 + EEL Versatile Transceiver - Development Status 18 ParameterNormalization16mA20mA24mA OMAOMA/300uW 1.081.131.17 Eye HeightEye Height/(0.6*OMA) 1.291.301.29 ERER/3 1.071.131.14 1/T r (1/T r )/(1/70ps) 0.890.860.83 1/T f (1/T f )/(1/70ps) 0.800.770.75 1/T j (1/T j )/(1/0.25UI) 1.010.980.96 1/D j (1/D j )/(1/0.12UI) 1.030.86 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

19. Versatile Link Future work ● Investigate options ● SM VCSEL vs EEL ● GaAs vs InGaAs PIN for MM applications ● Environmental tests ● Repeat magnetic field tests ● Conduct EMC/EMI tests ● Thermal tests ● Work on LC latch variants ● Finish and test dual transmitter design (VTTx) ● Integrate new generations of ASICs into the design Versatile Transceiver - Development Status 19 TWEPP 2011

20. Versatile Link Conclusion ● Successfully tested TOSA and ROSA components ● Identified candidate components for all flavors ● PCBs are ready for almost all variants ● Dual transmitter version will be ready soon ● Designed, manufactured and tested several VTRx prototypes ● Good performance has been demonstrated ● Boards are available for system integrators ● Ready to move on to Phase III Versatile Transceiver - Development Status 20 TWEPP 2011

21. Versatile Link Versatile Transceiver - Development Status 21 TWEPP 2011

22. Versatile Link TOSA Tests – Relative Intensity Noise 22 Correction: removal of thermal and shot noise Spectral data Fitting Versatile Transceiver - Development Status Extracted parameters: f r and Γ d TWEPP 2011

23. Versatile Link Printed Circuit Board Performance 23 VTRx input return loss VTRx performance comparison Versatile Transceiver - Development Status TWEPP 2011

24. Versatile Link Latch Performance Versatile Transceiver - Development Status 24 ParameterNormalizationw/o latch/w latch OMAOMA/300uW 1.051.31 Eye HeightEye Height/(0.6*OMA) 1.141.12 ERER/3 1.351.32 1/T r (1/T r )/(1/70ps) 1.992.08 1/T f (1/T f )/(1/70ps) 1.661.65 1/T j (1/T j )/(1/0.25UI) 2.773.29 1/D j (1/D j )/(1/0.12UI) 2.614.01 Note: Bit rate = 4.8 Gb/s, UI = 208 ps Normalized eye diagram parameters. Higher values represent better performance. Values smaller than 1 mean that the spec is violated. TWEPP 2011

25. Versatile Link Short ? It depends … Versatile Transceiver - Development Status 25 ~35 ps TWEPP 2011

26. Versatile Link Laser Modulation vs OMA 26 Example: assuming R out = 50, R load = 70, the current divider in the collector results in ±0.29xI tail through R load Versatile Transceiver - Development Status TWEPP 2011