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Design & Co-design of Embedded Systems Combinational Logic in SystemC Maziar Goudarzi.

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Presentation on theme: "Design & Co-design of Embedded Systems Combinational Logic in SystemC Maziar Goudarzi."— Presentation transcript:

1 Design & Co-design of Embedded Systems Combinational Logic in SystemC Maziar Goudarzi

2 2005 Design & Co-design of Embedded Systems2 Today Program zDescribing Combinational Logic for Simulation zSynthesizable Subset for Combinational Logic Chapter 5 of: J. Bhasker, “A SystemC Primer”, Star Galaxy Publishing, 2002.

3 2005 Design & Co-design of Embedded Systems3 Recommendations on Data Types  For one bit, use bool  For vectors and unsigned arithmetic, use sc_uint<>  For signed arithmetic use sc_int<>  If vector size>64, use sc_biguint<> or sc_bigint<>  For loop indices use int (do not rely on its size, however)  Use sc_logic and sc_lv<> only for four-valued logic zUse resolved types only when resolution is required (i.e., multiple drivers on a port or signal)

4 2005 Design & Co-design of Embedded Systems4 Combinational Logic zLogic circuit whose output is a function of its inputs sampled only at that same time Combinational Logic out t = f(in1 t, in2 t, in3 t ) in2 in1 in3

5 2005 Design & Co-design of Embedded Systems5 Simulating Combinational Logic in SystemC zUsing SC_METHOD process SC_MODULE(not_gate) { sc_in in; sc_out out; void proc() { out=!in.read(); } SC_CTOR(not_gate) { SC_METHOD(proc); sensitive<<in; } }; zNote: yAll inputs must appear in the sensitivity list yWhat happens if they don’t?

6 2005 Design & Co-design of Embedded Systems6 Simulating Combinational Logic in SystemC (cont’d) zUsing SC_THREAD process SC_MODULE(not_gate) { sc_in in; sc_out out; void proc() { while(1) { out=!in.read(); wait(); } SC_CTOR(not_gate) { SC_THREAD(proc); sensitive<<in; } }; zHow about SC_CTHREAD? Can it be used for combinational logic?

7 2005 Design & Co-design of Embedded Systems7 Logical Operators

8 2005 Design & Co-design of Embedded Systems8 Logical Operators on Vectors

9 2005 Design & Co-design of Embedded Systems9 Arithmetic Operators

10 2005 Design & Co-design of Embedded Systems10 Other Operators zSigned Arithmetic zRelational Operators

11 2005 Design & Co-design of Embedded Systems11 Other Operators (cont’d) zVectors and Ranges yConstant index yNon-constant index

12 2005 Design & Co-design of Embedded Systems12 What we learned today zHow to describe combinational logic yFor simulation yFor synthesis xSynthesis semantics of various C++ constructs

13 2005 Design & Co-design of Embedded Systems13 Assignments zAssignment 3: yIs put on the course web-page xExercises of Chapter 4 of “SystemC Primer” book xSynthesize your models using the available tool yDue date: xTwo weeks from now: Tuesday, Aban 24th


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