1. A JFET-based Circuit for Realizing a Precision and Linear Floating Voltage-controlled Resistance Background Voltage controlled-resistance (VCR) applications ◦ Analog multipliers ◦ Modulators & demodulators ◦ Volume controllers ◦ Programmable analog circuits Not useable as a floating VCR Useable only for small terminal voltages JFET-based floating VCR (Senani, 1994) Proposed circuit A JFET-based circuit for precision & linear floating VCR & resistance mirror, using the features of self- tracking & source-drain bootstrapped gate circuits. Features Voltage controlled: by v 1 or v 2 Current controlled: by current source i 1 in place of v 1 and R 1 Floating VCR: neither X nor Y needs to be grounded Resistance mirror: v C applied for controlling multiple X-Y terminal pairs Abstract —A JFET-based circuit for realizing a precision and linear floating voltage-controlled resistance (VCR) is presented for use in analog multipliers and programmable analog circuits and as a resistance mirror. It uses a matched JFET pair along with an op amp based negative feedback for realizing a precision resistance and a feedback of the source and drain voltages to the gate for realizing a linear floating resistance. The circuit operation is validated through circuit simulation and practical testing. JFET (or MOSFET) based grounded VCR Linear only for tens of mV of v DS Imprecision due to temperature- dependent & piece-to-piece variations Not useable as floating VCR. Source-drain bootstrapped gate: v D & v S superimposed on the control voltage Floating VCR with an extended range of linearity Imprecision due to temperature- dependent & piece- to-piece variations Precision grounded VCR (Clarke, 1977) Rani Holani, P. C. Pandey, and Nitya Tiwari Indian Institute of Technology Bombay Circuit description Operation Matched transistors Q1, Q2 in triode region Q1 channel resistance stabilized against parameter variations using negative feedback (op amp A1) Linearity extended by source-drain bootstrapped gates Q2: Floating resistor with terminals X and Y Simulation results A) Operation of A1-Q1 self- tracking: Effect of variation in V P and I DSS on v C, with v 1 as input B) Operation of full ckt: Effect of variation in v XY, V P and I DSS on R XY Single device: large change with v XY & device parameter variations Proposed ckt: < 5% change with v XY, variation, no dependence on device parameters Conclusion Precision & linear operation of the proposed floating VCR circuit validated using simulation and practical testing. Applications: voltage or current-controlled time-varying resistance, a resistance mirror for controlling resistances across a set of ports. Experimental results Self tracking ckt using matched JFET pair & op amp based negative feedback to compensate for variations in the device parameters Equations Simulation using LTspice IV for examining the effect of variation in device parameters (JFET pair U441, op amp LT1366 with ±15 V, v 2 = 1.0 V, R 1 = 1000 Ω, v Y = 0, variable v X ) Ckt components: JFET pair U441, op amp LT1366 with ±15 V, R2 = R3 = 1 MΩ, R4 = R5 = R6 = R7 = 12 kΩ, R8 = 6 kΩ (12 kΩ ║ 12 kΩ). Test condition: v 1 = −1 V, v 2 = 1 V, R1 = 1 kΩ, observed v C = −3.68 V, variable v X, v Y = 0. Result: R XY = 1033 Ω with −2.7% to 2.0% change for v XY of ± 1 V. Test condition: v 1 = −0.5 V, v 2 = 1 V, R1 = 1 kΩ, observed v C = −4.85 V, variable v X, v Y = 0. Result: R XY = 2039 Ω with −4.2% to 2.2% change for v XY of ± 1 V.  i 1 = − v 1 /R 1 ▪ v G1 = (v C + v 2 )/2 ▪ v G2 = (v C + v X + v Y )/2  i X = (v X − v Y )/[v 2 /(− v 1 /R 1 )], 0 ≥ v C ≥ 2V C & │ v X − v Y │≤ min(−v C, v C − V P )  R XY = [v 2 /(− v 1 )] R 1 IEEE Indicon 2014, 11-13 Dec, 2014, Pune, India, Paper No. 1098 (Poster session: Thursday, 13 th Dec, 0900-1300) R DS = v DS /i D = 1/[k(v GS − v P − v DS /2] v DS << v GS −V P